Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
KL

Konrad K. Lai — 60 Patents

Intel: 60 patents #489 of 30,777Top 2%
Vancouver, WA: #25 of 1,812 inventorsTop 2%
Washington: #791 of 76,902 inventorsTop 2%
Overall (All Time): #38,820 of 4,157,543Top 1%
60 Patents All Time
Konrad K. Lai has been granted 60 US patents while listed as an inventor at Intel. The first was granted in 1989 and the most recent in September 2019. Konrad K. Lai ranks #38,820 of 4,157,543 US inventors in our database (top 0.93%). Patent records list Konrad K. Lai in Vancouver, WA, US.

Issued Patents All Time

Showing 1–25 of 60 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10409612 Apparatus and method for transactional memory and lock elision including an abort instruction to abort speculative execution Martin G. Dixon, Ravi Rajwar, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy +4 more 2019-09-10 $24,704,000
10409611 Apparatus and method for transactional memory and lock elision including abort and end instructions to abort or commit speculative execution Martin G. Dixon, Ravi Rajwar, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy +4 more 2019-09-10 $24,704,000
10331452 Tracking mode of a processing device in instruction tracing systems Thilo Schmitt, Peter Lachner, Beeman C. Strong, Ofer Levy, Thomas Toll +3 more 2019-06-25 $17,766,000
10261879 Instruction and logic to test transactional execution status Ravi Rajwar, Bret L. Toll, Matthew C. Merten, Martin G. Dixon 2019-04-16 $24,207,000
10248524 Instruction and logic to test transactional execution status Ravi Rajwar, Bret L. Toll, Matthew C. Merten, Martin G. Dixon 2019-04-02 $26,887,000
10223227 Instruction and logic to test transactional execution status Ravi Rajwar, Bret L. Toll, Matthew C. Merten, Martin G. Dixon 2019-03-05 $19,977,000
10210065 Instruction and logic to test transactional execution status Ravi Rajwar, Bret L. Toll, Matthew C. Merten, Martin G. Dixon 2019-02-19 $27,334,000
10210066 Instruction and logic to test transactional execution status Ravi Rajwar, Bret L. Toll, Matthew C. Merten, Martin G. Dixon 2019-02-19 $27,334,000
10152401 Instruction and logic to test transactional execution status Ravi Rajwar, Bret L. Toll, Matthew C. Merten, Martin G. Dixon 2018-12-11 $24,515,000
10073719 Last branch record indicators for transactional memory Ravi Rajwar, Peter Lachner, Laura A. Knauth 2018-09-11 $19,778,000
9529645 Methods and apparatus to manage speculative execution of object locks by diverting the speculative execution of target code Suresh Srinivas, Stephen H. Dohrmann, Mingqiu Sun, Uma Srinivasan, Ravi Rajwar 2016-12-27 $11,980,000
9372764 Event counter checkpointing and restoring Laura A. Knauth, Ravi Rajwar, Martin G. Dixon, Peggy J. Irelan 2016-06-21 $13,200,000
9354878 Last branch record register for storing taken branch information and transactional memory transaction indicator to be used in transaction execution analysis Ravi Rajwar, Peter Lachner, Laura A. Knauth 2016-05-31 $9,993,000
9268596 Instruction and logic to test transactional execution status Ravi Rajwar, Bret L. Toll, Matthew C. Merten, Martin G. Dixon 2016-02-23 $10,383,000
8972994 Method and apparatus to bypass object lock by speculative execution of generated bypass code shell based on bypass failure threshold in managed runtime environment Suresh Srinivas, Stephen H. Dohrmann, Mingqiu Sun, Uma Srinivasan, Ravi Rajwar 2015-03-03 $18,773,000
8924692 Event counter checkpointing and restoring Laura A. Knauth, Ravi Rajwar, Martin G. Dixon, Peggy J. Irelan 2014-12-30 $18,984,000
8881106 Debugging parallel software using speculatively executed code sequences in a multiple core environment Peter Lachner, Ravi Rajwar 2014-11-04 $23,728,000
8782382 Last branch record indicators for transactional memory Ravi Rajwar, Peter Lachner, Laura A. Knauth 2014-07-15 $14,407,000
8479053 Processor with last branch record register storing transaction indicator Ravi Rajwar, Peter Lachner, Laura A. Knauth 2013-07-02 $20,773,000
8301849 Transactional memory in out-of-order processors with XABORT having immediate argument Ravi Rajwar, Martin G. Dixon 2012-10-30
8180977 Transactional memory in out-of-order processors Ravi Rajwar, Haitham Akkary 2012-05-15 $21,225,000
8180967 Transactional memory virtualization Ravi Rajwar, Haitham Akkary 2012-05-15 $21,225,000
7437542 Identifying and processing essential and non-essential code separately Hong Wang, Ralph M. Kling, Yong-Fong Lee, David A. Berson, Michael Kozuch 2008-10-14 $13,671,000
7076613 Cache line pre-load and pre-own based on cache coherence speculation Jih-Kwon Peir, Steve Yu Zhang, Scott H. Robinson, Wen-Hann Wang 2006-07-11 $15,043,000
7020766 Processing essential and non-essential code separately Hong Wang, Ralph M. Kling, Yong-Fong Lee, David A. Berson, Michael Kozuch 2006-03-28 $11,012,000