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Scalable distributed memory and I/O multiprocessor systems and associated methods |
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Scalable distributed memory and I/O multiprocessor systems and associated methods |
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2008-03-11 |
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Cache line pre-load and pre-own based on cache coherence speculation |
Jih-Kwon Peir, Steve Yu Zhang, Scott H. Robinson, Konrad K. Lai |
2006-07-11 |
| 7058750 |
Scalable distributed memory and I/O multiprocessor system |
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Cache line pre-load and pre-own based on cache coherence speculation |
Jih-Kwon Peir, Steve Yu Zhang, Scott H. Robinson, Konrad K. Lai |
2004-04-20 |
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Apparatus and method for caching lock conditions in a multi-processor system |
Konrad K. Lai, Gurbir Singh, Mandar Joshi, Nitin V. Sarangdhar, Matthew A. Fisch |
1999-12-21 |
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Computer system having tag information in a processor and cache memory |
— |
1999-09-21 |
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Backward inquiry to lower level caches prior to the eviction of a modified line from a higher level cache in a microprocessor hierarchical cache structure |
Quinn W. Merrell |
1998-10-27 |
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Method and apparatus for cache memory replacement line identification |
Gurbir Singh, Michael W. Rhodehamel, John M. Bauer, Nitin V. Sarangdhar |
1998-09-15 |
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Apparatus for maintaining multilevel cache hierarchy coherency in a multiprocessor computer system |
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1998-02-03 |
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Method and apparatus for transferring information between a processor and a memory system |
Gurbir Singh, Michael W. Rhodehamel, John M. Bauer, Nitin V. Sarangdhar |
1997-12-23 |
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Cache memory with reduced request-blocking |
John M. Bauer |
1997-06-24 |
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Virtual access cache protection bits handling method and apparatus |
— |
1997-04-08 |
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Apparatus and method of handling race conditions in mesi-based multiprocessor system with private caches |
Nitin V. Sarangdhar, Matthew A. Fisch |
1996-08-27 |
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Method and apparatus for combining a direct-mapped cache and a multiple-way cache in a cache memory |
Konrad K. Lai |
1996-08-20 |
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System and method for practicing essential inclusion in a multiprocessor and cache hierarchy |
Kimming So |
1996-06-25 |