Issued Patents All Time
Showing 25 most recent of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10719443 | Apparatus and method for implementing a multi-level memory hierarchy | Raj K. Ramanujan, Rajat Agarwal, Taarinya Polepeddi, Camille C. Raad, David J. Zimmerman +5 more | 2020-07-21 |
| 10241912 | Apparatus and method for implementing a multi-level memory hierarchy | Raj K. Ramanujan, Rajat Agarwal, Taarinya Polepeddi, Camille C. Raad, David J. Zimmerman +5 more | 2019-03-26 |
| 9600416 | Apparatus and method for implementing a multi-level memory hierarchy | Raj K. Ramanujan, Rajat Agarwal, Taarinya Polepeddi, Camille C. Raad, David J. Zimmerman +5 more | 2017-03-21 |
| 9423959 | Method and apparatus for store durability and ordering in a persistent memory architecture | Subramanya R. Dulloor, Sanjay Kumar, Rajesh M. Sankaran, Gilbert Neiger, Richard Uhlig +7 more | 2016-08-23 |
| 9391637 | Error correcting code scheme utilizing reserved space | Rajat Agrawal, Debaleena Das | 2016-07-12 |
| 9229828 | Mechanism for achieving high memory reliability, availability and serviceability | Dableena Das, Jonathan C. Jasper | 2016-01-05 |
| 9141166 | Method, apparatus, and system for energy efficiency and energy conservation including dynamic control of energy consumption in power domains | Krishnakanth V. Sistla, Martin T. Rowland, Cesar A. Quiroz, Joseph R. Doucette, Gopikrishna Jandhyala +2 more | 2015-09-22 |
| 8914704 | Mechanism for achieving high memory reliablity, availability and serviceability | Debaleena Das, Jonathan C. Jasper | 2014-12-16 |
| 8745464 | Rank-specific cyclic redundancy check | Ramesh Subashchandrabose, Tessil Thomas, Sambaran Mitra, Debaleena Das | 2014-06-03 |
| 8745306 | Scalable distributed memory and I/O multiprocessor system | Linda J. Rankin, Paul R. Pierce, Gregory E. Dermer, Wen-Hann Wang, Richard H. Hofsheier +1 more | 2014-06-03 |
| 8527836 | Rank-specific cyclic redundancy check | Ramesh Subashchandrabose, Tessil Thomas, Sambaran Mitra, Debaleena Das | 2013-09-03 |
| 8433856 | Pseudo least recently used replacement/allocation scheme in request agent affinitive set-associative snoop filter | David Lee, John A. Urbanski | 2013-04-30 |
| 8429367 | Systems, methods and apparatuses for clock enable (CKE) coordination | James W. Alexander, Son H. Lam, Devadatta V. Bodas, Krishna Kant, Ian M. Steiner +1 more | 2013-04-23 |
| 8255605 | Scalable distributed memory and I/O multiprocessor system | Linda J. Rankin, Paul R. Pierce, Gregory E. Dermer, Wen-Hann Wang, Richard H. Hofsheier +1 more | 2012-08-28 |
| 8055851 | Line swapping scheme to reduce back invalidations in a snoop filter | Meenakshisundaram R. Chinthamani, Malcolm Mandviwalla, Bahaa Fahim, Keith Robert Pflederer | 2011-11-08 |
| 8015365 | Reducing back invalidation transactions from a snoop filter | Tsvika Kurts, Jeffrey D. Gilbert, Julius Mandelblat | 2011-09-06 |
| 7996625 | Method and apparatus for reducing memory latency in a cache coherent multi-node architecture | Manoj Khare, Faye A. Briggs, Akhilesh Kumar, Lily P. Looi | 2011-08-09 |
| 7991963 | In-memory, in-page directory cache coherency scheme | Ian M. Steiner, Zhong-Ning Cai, Saurabh Tiwari | 2011-08-02 |
| 7984250 | Dynamic updating of thresholds in accordance with operating conditons | Robin A. Steinbrecher, Christian Le, Rahul Khanna, Fernando A. Lopez | 2011-07-19 |
| 7962694 | Partial way hint line replacement algorithm for a snoop filter | Meenakshisundaram R. Chinthamani, Malcolm Mandviwalla, Bahaa Fahim, Keith Robert Pflederer | 2011-06-14 |
| 7941618 | Fully buffered DIMM read data substitution for write acknowledgement | James W. Alexander, Rajat Agarwal, Bruce A. Christenson | 2011-05-10 |
| 7930464 | Scalable memory and I/O multiprocessor systems | Linda J. Rankin, Paul R. Pierce, Gregory E. Dermer, Wen-Hann Wang, Richard H. Hofsheier +1 more | 2011-04-19 |
| 7885914 | Systems, methods and apparatuses for rank coordination | James W. Alexander, Son H. Lam, Devadatta V. Bodas, Krishna Kant, Ian M. Steiner | 2011-02-08 |
| 7734980 | Mitigating silent data corruption in a buffered memory module architecture | James W. Alexander, Suresh Chittor, Dennis W. Brzezinski, Rajat Agarwal | 2010-06-08 |
| 7644347 | Silent data corruption mitigation using error correction code with embedded signaling fault detection | James W. Alexander, Suresh Chittor, Dennis W. Brzezinski, Henk G. Neefs, Rajat Agarwal | 2010-01-05 |