TP

Taarinya Polepeddi

IN Intel: 9 patents #4,428 of 30,777Top 15%
Overall (All Time): #563,564 of 4,157,543Top 15%
9
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10719443 Apparatus and method for implementing a multi-level memory hierarchy Raj K. Ramanujan, Rajat Agarwal, Kai Cheng, Camille C. Raad, David J. Zimmerman +5 more 2020-07-21
10691626 Memory channel that supports near memory and far memory access Bill Nale, Raj K. Ramanujan, Muthukumar P. Swaminathan, Tessil Thomas 2020-06-23
10282322 Memory channel that supports near memory and far memory access Bill Nale, Raj K. Ramanujan, Muthukuman P. Swaminathan, Tessil Thomas 2019-05-07
10282323 Memory channel that supports near memory and far memory access Bill Nale, Raj K. Ramanujan, Muthukumar P. Swaminathan, Tessil Thomas 2019-05-07
10241912 Apparatus and method for implementing a multi-level memory hierarchy Raj K. Ramanujan, Rajat Agarwal, Kai Cheng, Camille C. Raad, David J. Zimmerman +5 more 2019-03-26
10241943 Memory channel that supports near memory and far memory access Bill Nale, Raj K. Ramanujan, Muthukumar P. Swaminathan, Tessil Thomas 2019-03-26
9619408 Memory channel that supports near memory and far memory access Bill Nale, Raj K. Ramanujan, Muthukumar P. Swaminathan, Tessil Thomas 2017-04-11
9600416 Apparatus and method for implementing a multi-level memory hierarchy Raj K. Ramanujan, Rajat Agarwal, Kai Cheng, Camille C. Raad, David J. Zimmerman +5 more 2017-03-21
9342453 Memory channel that supports near memory and far memory access Bill Nale, Raj K. Ramanujan, Muthukumar P. Swaminathan, Tessil Thomas 2016-05-17