JA

James W. Alexander

IN Intel: 36 patents #988 of 30,777Top 4%
JP Jac Products: 2 patents #23 of 62Top 40%
Overall (All Time): #82,886 of 4,157,543Top 2%
39
Patents All Time

Issued Patents All Time

Showing 25 most recent of 39 patents

Patent #TitleCo-InventorsDate
10712796 Method and apparatus to generate and use power, thermal and performance characteristics of nodes to improve energy efficiency and reducing wait time for jobs in the queue Muralidhar Rajappa, Andy Hoffman, Devadatta V. Bodas, Justin J. Song 2020-07-14
10289183 Methods and apparatus to manage jobs that can and cannot be suspended when there is a change in power allocation to a distributed computer system Muralidhar Rajappa, Andy Hoffman, Devadatta V. Bodas, Justin J. Song 2019-05-14
10073659 Power management circuit with per activity weighting and multiple throttle down thresholds Muthukumar P. Swaminathan, Richard P. Mangold 2018-09-11
10037069 Dynamic link width modulation Neven M. Abou Gazala, Devadatta V. Bodas 2018-07-31
9927857 Profiling a job power and energy consumption for a data processing system Justin J. Song, Devadatta V. Bodas, Muralidhar Rajappa, Andy Hoffman, Joseph A. Schaefer +1 more 2018-03-27
9921633 Power aware job scheduler and manager for a data processing system Devadatta V. Bodas, Justin J. Song, Muralidhar Rajappa, Andy Hoffman, Joseph A. Schaefer +1 more 2018-03-20
9588823 Adjustment of execution of tasks Muralidhar Rajappa, Andy Hoffman, Devadatta V. Bodas, Justin J. Song 2017-03-07
9575536 Methods and apparatus to estimate power performance of a job that runs on multiple nodes of a distributed computer system Muralidhar Rajappa, Andy Hoffman, Devadatta V. Bodas, Justin J. Song, Joseph A. Schaefer +1 more 2017-02-21
9568978 Controlling power consumption in processor-based systems and components thereof James S. Burns, Muralidhar Rajappa 2017-02-14
9292465 Dynamic link width adjustment Malay Trivedi, Mohan Nair, Joseph Murray, Devadatta V. Bodas, Vijayendra K. Hoskoti 2016-03-22
9280194 Dynamic link width modulation Neven M. Abou Gazala, Devadatta V. Bodas 2016-03-08
9195404 Exposing protected memory addresses Devadatta V. Bodas, Muralidhar Rajappa, Ramkumar Nagappan, Andy Hoffman 2015-11-24
8935578 Method and apparatus for optimizing power and latency on a link Buck Gremel, Pinkesh Shah, Malay Trivedi, Mohan Nair 2015-01-13
8719606 Optimizing performance and power consumption during memory power down state Son H. Lam 2014-05-06
8661284 Method and system to improve the operations of a registered memory module Kuljit S. Bains, Howard S. David 2014-02-25
8438410 Memory power management via dynamic memory operation states Howard S. David, Ulf Hanebutte, Eugene Gorbatov, Suneeta Sah 2013-05-07
8429367 Systems, methods and apparatuses for clock enable (CKE) coordination Son H. Lam, Devadatta V. Bodas, Krishna Kant, Kai Cheng, Ian M. Steiner +1 more 2013-04-23
8375241 Method and system to improve the operations of a registered memory module Kuljit S. Bains, Howard S. David 2013-02-12
8327222 Mechanism for adjacent-symbol error correction and detection Thomas J. Holman, Mark A. Heap, Stanley S. Kulick 2012-12-04
7941618 Fully buffered DIMM read data substitution for write acknowledgement Rajat Agarwal, Bruce A. Christenson, Kai Cheng 2011-05-10
7885914 Systems, methods and apparatuses for rank coordination Son H. Lam, Devadatta V. Bodas, Krishna Kant, Kai Cheng, Ian M. Steiner 2011-02-08
7865753 Resource power controller to return a resource to an up state based on an estimate of a size of a gap in data traffic Krishna Kant, Rahul Khanna 2011-01-04
7804733 System and method for memory phase shedding Edward R. Stanford, Devadatta V. Bodas, Howard S. David, Son H. Lam 2010-09-28
7734980 Mitigating silent data corruption in a buffered memory module architecture Suresh Chittor, Dennis W. Brzezinski, Kai Cheng, Rajat Agarwal 2010-06-08
7644347 Silent data corruption mitigation using error correction code with embedded signaling fault detection Suresh Chittor, Dennis W. Brzezinski, Kai Cheng, Henk G. Neefs, Rajat Agarwal 2010-01-05