| 12032018 |
System and method for receiver equalization and stressed eye testing methodology for DDR5 memory controller |
Gang Zhao, Xusheng Liu, Yongyao Li |
2024-07-09 |
|
| 11624780 |
System and method for receiver equalization and stressed eye testing methodology for DDR5 memory controller |
Gang Zhao, Xusheng Liu, Yongyao Li |
2023-04-11 |
|
| 9448956 |
Stuffing bits on a memory bus between data bursts |
William Dawson Kesling, Michael J. Williams |
2016-09-20 |
$10,814,000 |
| 8738937 |
Method and apparatus to limit memory power |
Eugene Gorbatov, Ulf Hanebutte, Minh Le, Rahul Khanna |
2014-05-27 |
$13,313,000 |
| 8661284 |
Method and system to improve the operations of a registered memory module |
James W. Alexander, Kuljit S. Bains |
2014-02-25 |
$17,235,000 |
| 8438410 |
Memory power management via dynamic memory operation states |
Ulf Hanebutte, Eugene Gorbatov, James W. Alexander, Suneeta Sah |
2013-05-07 |
$21,295,000 |
| 8412479 |
Memory power estimation by means of calibrated weights and activity counters |
Eugene Gorbatov, Ulf Hanebutte, Minh Le, Rahul Khanna |
2013-04-02 |
$10,070,000 |
| 8375241 |
Method and system to improve the operations of a registered memory module |
James W. Alexander, Kuljit S. Bains |
2013-02-12 |
$14,270,000 |
| 8327172 |
Adaptive memory frequency scaling |
Hongzhong Zheng, Eugene Gorbatov, Ulf Hanebutte |
2012-12-04 |
$14,359,000 |
| 8122265 |
Power management using adaptive thermal throttling |
Sivakumar Radhakrishnan, Suneeta Sah, William Harry Nale, Rami Naqib, Rajat Agarwal |
2012-02-21 |
$21,312,000 |
| 8046559 |
Memory rank burst scheduling |
Hongzhong Zheng, Ulf Hanebutte, Eugene Gorbatov |
2011-10-25 |
$38,824,000 |
| 7958380 |
Coarsely controlling memory power states |
Sandeep Jain, Udayan Mukherjee |
2011-06-07 |
$16,749,000 |
| 7864604 |
Multiple address outputs for programming the memory register set differently for different DRAM devices |
— |
2011-01-04 |
$17,767,000 |
| 7844876 |
Temperature sampling in electronic devices |
David Wyatt, Christopher David Cox |
2010-11-30 |
$13,201,000 |
| 7804733 |
System and method for memory phase shedding |
James W. Alexander, Edward R. Stanford, Devadatta V. Bodas, Son H. Lam |
2010-09-28 |
$14,170,000 |
| 7626884 |
Optimizing mode register set commands |
Christopher E. Cox |
2009-12-01 |
$24,844,000 |
| 7392339 |
Partial bank DRAM precharge |
— |
2008-06-24 |
$20,489,000 |
| 7389387 |
Distributed memory module cache writeback |
— |
2008-06-17 |
$40,097,000 |
| 7318130 |
System and method for thermal throttling of memory modules |
Warren R. Morrow, Eric J. Dahlen, Raman Nayyar, Jayamohan Dharanipathi |
2008-01-08 |
$13,798,000 |
| 7269025 |
Ballout for buffer |
— |
2007-09-11 |
$15,808,000 |
| 7188208 |
Side-by-side inverted memory address and command buses |
Bill Nale |
2007-03-06 |
$17,685,000 |
| 7036053 |
Two dimensional data eye centering for source synchronous data transfers |
John F. Zumkehr, John L. Bryan, Klaus Ruff |
2006-04-25 |
$12,896,000 |
| 6976121 |
Apparatus and method to track command signal occurrence for DRAM data transfer |
Narendra S. Khandekar, Michael W. Williams |
2005-12-13 |
$11,810,000 |
| 6976120 |
Apparatus and method to track flag transitions for DRAM data transfer |
Narendra S. Khandekar, Michael W. Williams |
2005-12-13 |
$11,810,000 |
| 6938129 |
Distributed memory module cache |
— |
2005-08-30 |
$19,986,000 |
