Issued Patents All Time
Showing 25 most recent of 203 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12400703 | Per bank refresh hazard avoidance for large scale memory | Chang Kian Tan, Saravanan Sethuraman | 2025-08-26 |
| 12360847 | Adaptive internal error scrubbing and error handling | Kjersten E. Criss, Rajat Agarwal, Omar Avelar Suarez, Subhankar Panda, Theodros Yigzaw +3 more | 2025-07-15 |
| 12347507 | Method and apparatus for memory chip row hammer threat backpressure signal and host side response | Bill Nale, Jongwon Lee, Sreenivas Mandava | 2025-07-01 |
| 12347818 | Logic die in a multi-chip package having a configurable physical interface to on-package memory | Narasimha Lanka, Lohit Yerva, Mohammad Mamunur Rashid | 2025-07-01 |
| 12340863 | Stacked memory chip solution with reduced package inputs/outputs (I/Os) | Chong J. Zhao, Shigeki Tomishima, James A. McCall, Dimitrios Ziakas | 2025-06-24 |
| 12321634 | Double fetch for long burst length memory data transfer | Bill Nale | 2025-06-03 |
| 12265723 | Per channel thermal management techniques for stacked memory | Chang Kian Tan, Ru Yin Ng, Saravanan Sethuraman | 2025-04-01 |
| 12259777 | Uncorrectable memory error prediction | Shen ZHOU, Xiaoming Du, Cong Li, Rajat Agarwal, Murugasamy K. Nachimuthu +3 more | 2025-03-25 |
| 12235720 | Adaptive error correction to improve system memory reliability, availability, and serviceability (RAS) | Rajat Agarwal, Hsing-Min Chen, Wei-Pin Chen, Wei Wu, Jing Ling +7 more | 2025-02-25 |
| 12210456 | Dynamic random access memory (DRAM) with scalable meta data | — | 2025-01-28 |
| 12181966 | Reduction of latency impact of on-die error checking and correction (ECC) | Narasimha Lanka | 2024-12-31 |
| 12164373 | Memory chip with per row activation count having error correction code protection | Bill Nale, Lawrence D. BLANKENBECKLER, Ronald ANDERSON, Jongwon Lee | 2024-12-10 |
| 12087352 | Techniques to couple high bandwidth memory device on silicon substrate and package substrate | Chong J. Zhao, James A. McCall, Shigeki Tomishima, George Vergis | 2024-09-10 |
| 11989106 | Inline buffer for in-memory post package repair (PPR) | Jongwon Lee | 2024-05-21 |
| 11966286 | Read retry to selectively disable on-die ECC | Rajat Agarwal, Jongwon Lee | 2024-04-23 |
| 11954360 | Technology to provide accurate training and per-bit deskew capability for high bandwidth memory input/output links | Narasimha Lanka, Lohit Yerva | 2024-04-09 |
| 11837314 | Undo and redo of soft post package repair | Bill Nale, Wei-Pin Chen, Rajat Agarwal | 2023-12-05 |
| 11776619 | Techniques to couple high bandwidth memory device on silicon substrate and package substrate | Chong J. Zhao, James A. McCall, Shigeki Tomishima, George Vergis | 2023-10-03 |
| 11704194 | Memory wordline isolation for improvement in reliability, availability, and scalability (RAS) | — | 2023-07-18 |
| 11650765 | Apparatus and method for performing persistent write operations using a persistent write command | Raj K. Ramanujan, Liyong Wang, Wesley Queen | 2023-05-16 |
| 11557333 | Techniques to couple high bandwidth memory device on silicon substrate and package substrate | Chong J. Zhao, James A. McCall, Shigeki Tomishima, George Vergis | 2023-01-17 |
| 11335395 | Applying chip select for memory device identification and power management control | Christopher E. Cox, Christopher P. Mozak, James A. McCall, Akshith Vasanth, Bill Nale | 2022-05-17 |
| 11314589 | Read retry to selectively disable on-die ECC | Rajat Agarwal, Jongwon Lee | 2022-04-26 |
| 11210167 | Memory wordline isolation for improvement in reliability, availability, and scalability (RAS) | — | 2021-12-28 |
| 11194524 | Apparatus and method for performing persistent write operations using a persistent write command | Raj K. Ramanujan, Liyong Wang, Wesley Queen | 2021-12-07 |