Issued Patents All Time
Showing 1–25 of 146 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12340863 | Stacked memory chip solution with reduced package inputs/outputs (I/Os) | Chong J. Zhao, Kuljit S. Bains, James A. McCall, Dimitrios Ziakas | 2025-06-24 |
| 12191135 | Two transistor gain cell memory with indium gallium zinc oxide | — | 2025-01-07 |
| 12182455 | Data processing near data storage | Nilesh N. Shah, Chetan Chauhan, Nahid Hassan, Andrew Chaang Ling | 2024-12-31 |
| 12087352 | Techniques to couple high bandwidth memory device on silicon substrate and package substrate | Chong J. Zhao, James A. McCall, George Vergis, Kuljit S. Bains | 2024-09-10 |
| 11868665 | Data processing near data storage | Nilesh N. Shah, Chetan Chauhan, Nahid Hassan, Andrew Chaang Ling | 2024-01-09 |
| 11776619 | Techniques to couple high bandwidth memory device on silicon substrate and package substrate | Chong J. Zhao, James A. McCall, George Vergis, Kuljit S. Bains | 2023-10-03 |
| 11687404 | Technologies for preserving error correction capability in compute-in-memory operations | Chetan Chauhan, Wei Wu, Rajesh Sundaram | 2023-06-27 |
| 11620358 | Technologies for performing macro operations in memory | Chetan Chauhan, Rajesh Sundaram, Richard Coulson, Bruce Querbach, Jawad B. Khan +1 more | 2023-04-04 |
| 11557333 | Techniques to couple high bandwidth memory device on silicon substrate and package substrate | Chong J. Zhao, James A. McCall, George Vergis, Kuljit S. Bains | 2023-01-17 |
| 11456281 | Architecture and processes to enable high capacity memory packages through memory die stacking | Yi Li, Zhiguo Qian, Prasad Ramanathan, Saikumar Jayaraman, Kemal Aygun +3 more | 2022-09-27 |
| 11301167 | Technologies for providing multiple tier memory media management | Jawad B. Khan, Srikanth Srinivasan, Chetan Chauhan, Rajesh Sundaram | 2022-04-12 |
| 11262954 | Data processing near data storage | Nilesh N. Shah, Chetan Chauhan, Nahid Hassan, Andrew Chaang Ling | 2022-03-01 |
| 11237903 | Technologies for providing ECC pre-provisioning and handling for cross-point memory and compute operations | Rajesh Sundaram, Wei Wu, Chetan Chauhan, Srikanth Srinivasan | 2022-02-01 |
| 11182242 | Technologies for preserving error correction capability in compute-in-memory operations | Chetan Chauhan, Wei Wu, Rajesh Sundaram | 2021-11-23 |
| 11182158 | Technologies for providing adaptive memory media management | Bruce Querbach, Srikanth Srinivasan, Chetan Chauhan, Rajesh Sundaram | 2021-11-23 |
| 11080226 | Technologies for providing a scalable architecture for performing compute operations in memory | Srikanth Srinivasan, Chetan Chauhan, Rajesh Sundaram, Jawad B. Khan | 2021-08-03 |
| 11056179 | Techniques to couple high bandwidth memory device on silicon substrate and package substrate | Chong J. Zhao, James A. McCall, George Vergis, Kuljit S. Bains | 2021-07-06 |
| 11023320 | Technologies for providing multiple levels of error correction | Wei Wu, Rajesh Sundaram, Chetan Chauhan, Jawad B. Khan, Srikanth Srinivasan | 2021-06-01 |
| 10783281 | Systems, methods, and apparatus for combatting direct memory access attacks | Anna Trikalinou, Daniel S. Lake | 2020-09-22 |
| 10600462 | Bitcell state retention | Charles Augustine, James W. Tschanz, Shih-Lien Linus Lu | 2020-03-24 |
| 10552257 | Adaptive error correction in memory devices | Helia Naeimi, Wei Wu, Shih-Lien Linus Lu | 2020-02-04 |
| 10534747 | Technologies for providing a scalable architecture for performing compute operations in memory | Srikanth Srinivasan, Chetan Chauhan, Rajesh Sundaram, Jawad B. Khan | 2020-01-14 |
| 10490239 | Programmable data pattern for repeated writes to memory | Kuljit S. Bains | 2019-11-26 |
| 10418098 | Methods and systems for performing a calculation across a memory array | Srikanth Srinivasan | 2019-09-17 |
| 10297302 | Magnetic storage cell memory with back hop-prevention | Charles Augustine, Wei Wu, Shih-Lien Linus Lu, James W. Tschanz, Georgios Panagopoulos +1 more | 2019-05-21 |