Issued Patents All Time
Showing 26–50 of 146 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10217493 | DRAM data path sharing via a split local data bus | Wei Wu, Shih-Lien Linus Lu | 2019-02-26 |
| 10083140 | DRAM data path sharing via a segmented global data bus | Wei Wu, Shih-Lien Linus Lu | 2018-09-25 |
| 10068636 | Apparatuses and methods for accessing and scheduling between a plurality of row buffers | Berkin Akin | 2018-09-04 |
| 10069628 | Technologies for physically unclonable functions with magnetic tunnel junctions | — | 2018-09-04 |
| 10056127 | Supply-switched dual cell memory bitcell | — | 2018-08-21 |
| 10031684 | Techniques for a write zero operation | Kuljit S. Bains | 2018-07-24 |
| 9965415 | DRAM data path sharing via a split local data bus and a segmented global data bus | Wei Wu, Shih-Lien Linus Lu | 2018-05-08 |
| 9934827 | DRAM data path sharing via a split local data bus | Wei Wu, Shih-Lien Linus Lu | 2018-04-03 |
| 9934082 | Apparatus and method for detecting single flip-error in a complementary resistive memory | Charles Augustine, Wei Wu, Shih-Lien Linus Lu | 2018-04-03 |
| 9922695 | Apparatus and method for page copying within sections of a memory | Shih-Lien Linus Lu | 2018-03-20 |
| 9858984 | Apparatuses, methods, and systems for increasing a speed of removal of data from a memory cell | Shih-Lien Linus Lu, Helia Naeimi | 2018-01-02 |
| 9830988 | Apparatus to reduce retention failure in complementary resistive memory | Charles Augustine, Wei Wu, Shih-Lien Linus Lu, James W. Tschanz | 2017-11-28 |
| 9804793 | Techniques for a write zero operation | Kuljit S. Bains | 2017-10-31 |
| 9761297 | Hidden refresh control in dynamic random access memory | — | 2017-09-12 |
| 9747967 | Magnetic field-assisted memory operation | Helia Naeimi, Shih-Lien Linus Lu | 2017-08-29 |
| 9715916 | Supply-switched dual cell memory bitcell | — | 2017-07-25 |
| 9666257 | Bitcell state retention | Charles Augustine, James W. Tschanz, Shih-Lien Linus Lu | 2017-05-30 |
| 9653468 | Memory cells having a folded digit line architecture | — | 2017-05-16 |
| 9600183 | Apparatus, system and method for determining comparison information based on memory data | Shih-Lien Linus Lu | 2017-03-21 |
| 9558807 | Apparatuses and systems for increasing a speed of removal of data stored in a memory cell | Shih-Lien Linus Lu, Helia Naeimi | 2017-01-31 |
| 9529660 | Apparatus and method for detecting single flip-error in a complementary resistive memory | Charles Augustine, Wei Wu, Shih-Lien Linus Lu | 2016-12-27 |
| 9514796 | Magnetic storage cell memory with back hop-prevention | Charles Augustine, Wei Wu, Shih-Lien Linus Lu, James W. Tschanz, Georgios Panagopoulos +1 more | 2016-12-06 |
| 9437298 | Self-storing and self-restoring non-volatile static random access memory | Dmitri E. Nikonov, Elijah V. Karpov, Ian A. Young, Robert S. Chau | 2016-09-06 |
| 9373395 | Apparatus to reduce retention failure in complementary resistive memory | Charles Augustine, Wei Wu, Shih-Lien L. Liu, James W. Tschanz | 2016-06-21 |
| 9361972 | Charge level maintenance in a memory | — | 2016-06-07 |