Issued Patents All Time
Showing 25 most recent of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11620358 | Technologies for performing macro operations in memory | Chetan Chauhan, Rajesh Sundaram, Richard Coulson, Jawad B. Khan, Shigeki Tomishima +1 more | 2023-04-04 |
| 11264094 | Memory cell including multi-level sensing | Christopher Connor | 2022-03-01 |
| 11182158 | Technologies for providing adaptive memory media management | Shigeki Tomishima, Srikanth Srinivasan, Chetan Chauhan, Rajesh Sundaram | 2021-11-23 |
| 11074151 | Processor having embedded non-volatile random access memory to support processor monitoring software | Christopher Connor | 2021-07-27 |
| 10878100 | Secure boot processor with embedded NVRAM | Christopher Connor | 2020-12-29 |
| 10691466 | Booting a computing system using embedded non-volatile memory | Christopher Connor | 2020-06-23 |
| 10599592 | Extended platform with additional memory module slots per CPU socket and configured for increased performance | Pete D. Vogt | 2020-03-24 |
| 10242717 | Extended platform with additional memory module slots per CPU socket | Pete D. Vogt | 2019-03-26 |
| 10216657 | Extended platform with additional memory module slots per CPU socket and configured for increased performance | Pete D. Vogt | 2019-02-26 |
| 10198333 | Test, validation, and debug architecture | Mark B. Trobough, Keshavan Tiruvallur, Chinna Prudvi, Christian Iovin, David W. Grawrock +37 more | 2019-02-05 |
| 10163502 | Selective performance level modes of operation in a non-volatile memory | Christopher Connor, Hanmant P. Belgal | 2018-12-25 |
| 10163508 | Supporting multiple memory types in a memory slot | Woojong Han, Mohamed Arafa, Brian S. Morris, Mani N. Prakash, James K. Pickett +3 more | 2018-12-25 |
| 10014036 | Low power and area efficient memory receiver | Kuan Zhou, Li-Te Pan | 2018-07-03 |
| 9977075 | Integrated circuit reliability assessment apparatus and method | Christopher Connor, Gordon McFadden, Rahul Khanna | 2018-05-22 |
| 9953694 | Memory controller-controlled refresh abort | Kuljit S. Bains, John B. Halbert | 2018-04-24 |
| 9922725 | Integrated circuit defect detection and repair | William K. Lui, David G. Ellis, David J. Zimmerman, Theodore Z. Schoenborn, Christopher W. Hampson +2 more | 2018-03-20 |
| 9824743 | Memory refresh operation with page open | Kuljit S. Bains, John B. Halbert | 2017-11-21 |
| 9818457 | Extended platform with additional memory module slots per CPU socket | Pete D. Vogt | 2017-11-14 |
| 9691492 | Determination of demarcation voltage for managing drift in non-volatile memory devices | Zion S. Kwok, Christopher Connor, Philip Hillier, Jeffrey W. Ryden | 2017-06-27 |
| 9659626 | Memory refresh operation with page open | Kuljit S. Bains, John B. Halbert | 2017-05-23 |
| 9564245 | Integrated circuit defect detection and repair | Theodore Z. Schoenborn, David J. Zimmerman, David G. Ellis, Christopher W. Hampson, Ifar Wan +3 more | 2017-02-07 |
| 9548137 | Integrated circuit defect detection and repair | William K. Lui, David G. Ellis, David J. Zimmerman, Theodore Z. Schoenborn, Christopher W. Hampson +2 more | 2017-01-17 |
| 8868992 | Robust memory link testing using memory controller | Bryan L. Spry, Theodore Z. Schoenborn, Philip Abraham, Christopher P. Mozak, David G. Ellis +6 more | 2014-10-21 |
| 7501863 | Voltage margining with a low power, high speed, input offset cancelling equalizer | Randall B. Hamilton, Luke A. Johnson, Minyoung KIM | 2009-03-10 |
| 7480360 | Regulating a timing between a strobe signal and a data signal | Mohammad Abdallah, Amjad Khan, Mir M. Hossain, Sanjib Sarkar | 2009-01-20 |