Issued Patents All Time
Showing 25 most recent of 99 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12046577 | Stacked memory with interface providing offset interconnects | Pete D. Vogt, Andre Schaefer, Warren R. Morrow, Jin-Sung Kim, Kenneth D. Shoemaker | 2024-07-23 |
| 11010304 | Memory with reduced exposure to manufacturing related data corruption errors | Uksong Kang, Kjersten E. Criss, Rajat Agarwal | 2021-05-18 |
| 10949296 | On-die ECC with error counter and internal address generation | Kuljit S. Bains | 2021-03-16 |
| 10810079 | Memory device error check and scrub mode and error transparency | Kuljit S. Bains | 2020-10-20 |
| 10572343 | Targeted aliasing single error correction (SEC) code | Kjersten E. Criss | 2020-02-25 |
| 10522207 | Performance of additional refresh operations during self-refresh mode | Kuljit S. Bains, Shay Fux | 2019-12-31 |
| 10496473 | Extracting selective information from on-die dynamic random access memory (DRAM) error correction code (ECC) | Debaleena Das, Bill Nale, Kuljit S. Bains | 2019-12-03 |
| 10489083 | Flexible command addressing for memory | Kuljit S. Bains | 2019-11-26 |
| 10459809 | Stacked memory chip device with enhanced data protection capability | Hussein Alameer, Uksong Kang, Kjersten E. Criss, Rajat Agarwal, Wei Wu | 2019-10-29 |
| 10242727 | Reduction of power consumption in memory devices during refresh modes | Christopher E. Cox, Kuljit S. Bains | 2019-03-26 |
| 10210925 | Row hammer refresh command | Kuljit S. Bains, Christopher P. Mozak, Theodore Z. Schoenborn, Zvika Greenfield | 2019-02-19 |
| 10127101 | Memory device error check and scrub mode and error transparency | Kuljit S. Bains | 2018-11-13 |
| 10121532 | Apparatus, method and system for performing successive writes to a bank of a dynamic random access memory | Kuljit S. Bains | 2018-11-06 |
| 10109340 | Precharging and refreshing banks in memory device with bank group architecture | Kuljit S. Bains, Nadav Bonen, Tomer Levy | 2018-10-23 |
| 10108512 | Validation of memory on-die error correction code | Kuljit S. Bains | 2018-10-23 |
| 10083737 | Row hammer monitoring based on stored row hammer threshold value | Kuljit S. Bains | 2018-09-25 |
| 9984737 | Reduction of power consumption in memory devices during refresh modes | Christopher E. Cox, Kuljit S. Bains | 2018-05-29 |
| 9953694 | Memory controller-controlled refresh abort | Bruce Querbach, Kuljit S. Bains | 2018-04-24 |
| 9904591 | Device, system and method to restrict access to data error information | Kuljit S. Bains, Debaleena Das, Bill Nale | 2018-02-27 |
| 9865326 | Row hammer refresh command | Kuljit S. Bains, Christopher P. Mozak, Theodore Z. Schoenborn, Zvika Greenfield | 2018-01-09 |
| 9842021 | Memory device check bit read mode | Kuljit S. Bains | 2017-12-12 |
| 9824743 | Memory refresh operation with page open | Bruce Querbach, Kuljit S. Bains | 2017-11-21 |
| 9817714 | Memory device on-die error checking and correcting code | Kuljit S. Bains, Kjersten E. Criss | 2017-11-14 |
| 9811420 | Extracting selective information from on-die dynamic random access memory (DRAM) error correction code (ECC) | Debaleena Das, Bill Nale, Kuljit S. Bains | 2017-11-07 |
| 9768148 | Stacked memory with interface providing offset interconnects | Pete D. Vogt, Andre Schaefer, Warren R. Morrow, Jin-Sung Kim, Kenneth D. Shoemaker | 2017-09-19 |