Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11887650 | Semiconductor memory device managing flexible refresh skip area | Hoiju Chung | 2024-01-30 |
| 11631449 | Semiconductor memory device managing flexible refresh skip area | Hoiju Chung | 2023-04-18 |
| 11614866 | Nonvolatile memory device and operation method thereof | Youngjin Cho, Sungyong Seo, Sun-Young Lim, Chankyung Kim, Duckhyun Chang +1 more | 2023-03-28 |
| 11106363 | Nonvolatile memory device and operation method thereof | Youngjin Cho, Sungyong Seo, Sun-Young Lim, Chankyung Kim, Duckhyun Chang +1 more | 2021-08-31 |
| 11010304 | Memory with reduced exposure to manufacturing related data corruption errors | Kjersten E. Criss, Rajat Agarwal, John B. Halbert | 2021-05-18 |
| 10824499 | Memory system architectures using a separate system control path or channel for processing error information | Chaohong Hu, Hongzhong Zheng, Zhan Ping | 2020-11-03 |
| 10770129 | Pseudo-channeled DRAM | Hussein Alameer, Kjersten E. Criss | 2020-09-08 |
| 10755753 | Memory device with flexible internal data write control circuitry | Christopher E. Cox | 2020-08-25 |
| 10599206 | Techniques to change a mode of operation for a memory device | Christopher E. Cox | 2020-03-24 |
| 10482947 | Integrated error checking and correction (ECC) in byte mode memory devices | Christopher E. Cox, Nagi Aboulenein | 2019-11-19 |
| 10459809 | Stacked memory chip device with enhanced data protection capability | Hussein Alameer, Kjersten E. Criss, Rajat Agarwal, Wei Wu, John B. Halbert | 2019-10-29 |
| 10311936 | Semiconductor memory device managing flexible refresh skip area | Hoiju Chung | 2019-06-04 |
| 10303372 | Nonvolatile memory device and operation method thereof | Youngjin Cho, Sungyong Seo, Sun-Young Lim, Chankyung Kim, Duckhyun Chang +1 more | 2019-05-28 |
| 10269394 | Memory package, memory module including the same, and operation method of memory package | Chankyung Kim, Nam Sung Kim | 2019-04-23 |
| 10249351 | Memory device with flexible internal data write control circuitry | Christopher E. Cox | 2019-04-02 |
| 10140176 | Semiconductor memory device, memory system including the same, and method of error correction of the same | Sanguhn Cha, Hoiju Chung, Chulwoo Park | 2018-11-27 |
| 10002044 | Memory devices and modules | Chaohong Hu, Hongzhong Zheng, Zhan Ping | 2018-06-19 |
| 10002043 | Memory devices and modules | Chaohong Hu, Liang Yin, Hongzhong Zheng | 2018-06-19 |
| 9971697 | Nonvolatile memory module having DRAM used as cache, computing system having the same, and operating method thereof | Chankyung Kim, Sanguhn Cha, Sungyong Seo, Youngjin Cho, Seongil O | 2018-05-15 |
| 9934154 | Electronic system with memory management mechanism and method of operation thereof | Krishna T. Malladi, Hongzhong Zheng | 2018-04-03 |
| 9847105 | Memory package, memory module including the same, and operation method of memory package | Chankyung Kim, Nam Sung Kim | 2017-12-19 |
| 9772900 | Tiered ECC single-chip and double-chip Chipkill scheme | Chaohong Hu, Hongzhong Zheng | 2017-09-26 |
| 9305616 | Semiconductor memory cell array having fast array area and semiconductor memory including the same | Haksoo Yu, Dae Hyun Kim, Chulwoo Park, Joosun Choi, Hyojin Choi | 2016-04-05 |
| 9292425 | Semiconductor memory device with operation functions to be used during a modified read or write mode | Hyojin Choi, Chulwoo Park, Haksoo Yu | 2016-03-22 |
| 7082071 | Integrated DDR/SDR flow control managers that support multiple queues and MUX, DEMUX and broadcast operating modes | Roland T. Knaack, David Gibson, Mario Montana, Mario Au, Stewart Speed +1 more | 2006-07-25 |