Issued Patents All Time
Showing 25 most recent of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12046577 | Stacked memory with interface providing offset interconnects | Andre Schaefer, Warren R. Morrow, John B. Halbert, Jin-Sung Kim, Kenneth D. Shoemaker | 2024-07-23 |
| 10599592 | Extended platform with additional memory module slots per CPU socket and configured for increased performance | Bruce Querbach | 2020-03-24 |
| 10592445 | Techniques to access or operate a dual in-line memory module via multiple data channels | Bill Nale, Christopher E. Cox, Kuljit S. Bains, George Vergis, James A. McCall +3 more | 2020-03-17 |
| 10509738 | Remote memory operations | Francesc Guim Bernat, Karthik Kumar, Thomas Willhalm, Narayan Ranganathan | 2019-12-17 |
| 10339072 | Read delivery for memory subsystem with narrow bandwidth repeater channel | Bill Nale | 2019-07-02 |
| 10249597 | Systems, methods, and apparatuses for implementing die recovery in two-level memory (2LM) stacked die subsystems | Lakshminarayana Pappu, Kalyan C. Kolluru, Christopher J. Nelson, Amande B. Trang, Uddalak Bhattacharya | 2019-04-02 |
| 10242717 | Extended platform with additional memory module slots per CPU socket | Bruce Querbach | 2019-03-26 |
| 10216657 | Extended platform with additional memory module slots per CPU socket and configured for increased performance | Bruce Querbach | 2019-02-26 |
| 10146711 | Techniques to access or operate a dual in-line memory module via multiple data channels | Bill Nale, Kuljit S. Bains, George Vergis, Christopher E. Cox, James A. McCall +3 more | 2018-12-04 |
| 10120749 | Extended application of error checking and correction code in memory | — | 2018-11-06 |
| 10031802 | Embedded ECC address mapping | — | 2018-07-24 |
| 9841920 | Heterogeneous memory die stacking for energy efficient computing | — | 2017-12-12 |
| 9818457 | Extended platform with additional memory module slots per CPU socket | Bruce Querbach | 2017-11-14 |
| 9768148 | Stacked memory with interface providing offset interconnects | Andre Schaefer, Warren R. Morrow, John B. Halbert, Jin-Sung Kim, Kenneth D. Shoemaker | 2017-09-19 |
| 9652170 | Memory device responding to device commands for operational controls | — | 2017-05-16 |
| 9627357 | Stacked memory allowing variance in device interconnects | Kenneth D. Shoemaker | 2017-04-18 |
| 9335373 | Memory channel having deskew separate from redrive | — | 2016-05-10 |
| 9240250 | Apparatus and method to reduce power delivery noise for partial writes | Kuljit S. Bains, James A. McCall, Michael Gutzmann | 2016-01-19 |
| 9223718 | Memory device responding to device commands for operational controls | — | 2015-12-29 |
| 8971087 | Stacked memory with interface providing offset interconnects | Andre Schaefer, Warren R. Morrow, John B. Halbert, Jin-Sung Kim, Kenneth D. Shoemaker | 2015-03-03 |
| 8843794 | Method, system and apparatus for evaluation of input/output buffer circuitry | Christopher J. Nelson, Tak M. Mak, David J. Zimmerman | 2014-09-23 |
| 8756450 | Memory channel having deskew separate from redrive | — | 2014-06-17 |
| 8510612 | Disabling outbound drivers for a last memory buffer on a memory channel | Dennis W. Brzezinski, Warren R. Morrow | 2013-08-13 |
| 8489944 | Disabling outbound drivers for a last memory buffer on a memory channel | Warren R. Morrow, Dennis W. Brzezinski | 2013-07-16 |
| 8286039 | Disabling outbound drivers for a last memory buffer on a memory channel | Dennis W. Brzezinski, Warren R. Morrow | 2012-10-09 |