Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
GV

George Vergis — 95 Patents

Intel: 68 patents #409 of 30,777Top 2%
Comcast: 12 patents #344 of 4,447Top 8%
ZIZilog: 6 patents #12 of 150Top 8%
UCUei Cayman: 3 patents #4 of 11Top 40%
TRTahoe Research: 3 patents #2 of 215Top 1%
IGIxys Ch Gmbh: 1 patents #18 of 32Top 60%
SSSk Hynix Nand Product Solutions: 1 patents #82 of 148Top 60%
ILIxys Intl Limited: 1 patents #4 of 14Top 30%
Portland, OR: #131 of 9,213 inventorsTop 2%
Oregon: #241 of 28,073 inventorsTop 1%
Overall (All Time): #16,077 of 4,157,543Top 1%
95 Patents All Time
George Vergis has been granted 95 US patents while listed as an inventor at Intel. The first was granted in 2002 and the most recent in December 2025. George Vergis ranks #16,077 of 4,157,543 US inventors in our database (top 0.39%). Patent records list George Vergis in Portland, OR, US.

Issued Patents All Time

Showing 1–25 of 95 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12495497 Low power memory module Xingli LI, Konika Ganguly, Stephen Christianson, Xiaojian Dong, Landon HANKS 2025-12-09
12481546 Self-healing low speed serial interface Rajesh Bhaskar, Myron Loewen, Matthew A. Schnoor 2025-11-25
12332812 Memory device manageability bus John R. Goles 2025-06-17
12334674 DIMM retention assembly for compression mount technology and land grid array connector loading Xiang Li, Phil Geng 2025-06-17
12315588 Method and apparatus for improved memory module supply current surge response Douglas Heymann 2025-05-27
12315587 DIMM socket with seating floor to meet both longer length edge contacts and shorter length edge contacts Xiang Li 2025-05-27
12300931 Dual in-line memory module (DIMM) socket that prevents improper DIMM release Xiang Li 2025-05-13
12294167 Closed loop compressed connector pin Xiang Li, Konika Ganguly 2025-05-06
12267957 Hybrid pitch through hole connector Xiang Li, Jeffrey Krieger 2025-04-01
12237620 Device-to-device connection with multiple parallel ground pins Xiang Li 2025-02-25
12147698 High performance memory module with reduced loading Bill Nale 2024-11-19 $25,575,000
12144110 Reduced vertical profile ejector for liquid cooled modules Guixiang Tan, Xiang Li, Casey Winkel 2024-11-12 $28,491,000
12106818 Power control of a memory device in connected standby state Aiswarya M. Pious, Raji James, Phani Alaparthi, Bill Nale, Konika Ganguly 2024-10-01 $20,560,000
12087352 Techniques to couple high bandwidth memory device on silicon substrate and package substrate Chong J. Zhao, James A. McCall, Shigeki Tomishima, Kuljit S. Bains 2024-09-10
12069329 Dynamic linking of codesets in universal remote control devices Sunilkumar Mankame 2024-08-20 $699,000
12040568 Connector with staggered pin orientation Xiang Li, Konika Ganguly 2024-07-16 $26,089,000
11984685 Retention latch with spring mechanism Phil Geng, Xiang Li, Mani N. Prakash 2024-05-14 $33,809,000
11961391 Codeset communication format and related methods and structures 2024-04-16 $822,000
11928042 Initialization and power fail isolation of a memory module in a system Dat Le 2024-03-12 $37,196,000
11921652 Method, apparatus and system for device transparent grouping of devices on a bus Kenneth P. Foust, Amit Kumar Srivastava 2024-03-05 $29,696,000
11789880 Load reduced nonvolatile memory interface Emily Po-Kay Chung, Frank T. Hady 2023-10-17
11792466 Dynamic linking of codesets in universal remote control devices Sunilkumar Mankame 2023-10-17 $313,000
11776619 Techniques to couple high bandwidth memory device on silicon substrate and package substrate Chong J. Zhao, James A. McCall, Shigeki Tomishima, Kuljit S. Bains 2023-10-03
11657703 Codeset communication format and related methods and structures 2023-05-23 $723,000
11589103 Dynamic linking of codesets in universal remote control devices Sunilkumar Mankame 2023-02-21 $2,105,000