Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Phil Geng — 20 Patents

Intel: 20 patents #2,048 of 30,777Top 7%
Washougal, WA: #6 of 115 inventorsTop 6%
Washington: #4,680 of 76,902 inventorsTop 7%
Overall (All Time): #214,803 of 4,157,543Top 6%
20 Patents All Time
Phil Geng has been granted 20 US patents while listed as an inventor at Intel. The first was granted in 2003 and the most recent in December 2025. Phil Geng ranks #214,803 of 4,157,543 US inventors in our database (top 5.2%). Patent records list Phil Geng in Washougal, WA, US.

Issued Patents All Time

Showing 1–20 of 20 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12494441 BGA stiffener attachment with low Eolife adhesive strength at high solder joint stress area generated from enabling load Patrick Nardi, Ravindranath V. Mahajan, Dingying Xu, Praveen Raghavan, John Harper +2 more 2025-12-09
12476167 Semiconductor chip package thermo-mechanical cooling assembly Olaotan ELENITOBA-JOHNSON, Eric C. Erike, Jeffory L. Smalley, Ulises Encarnacion, Ralph V. Miele +2 more 2025-11-18
12453054 Cooling assembly with strap element to diminish lateral movement of cooling mass during installation of the cooling mass Ralph V. Miele, David Shia, Sandeep Ahuja, Jeffory L. Smalley 2025-10-21
12334674 DIMM retention assembly for compression mount technology and land grid array connector loading Xiang Li, George Vergis 2025-06-17
12315780 Technologies for processor loading mechanisms Ralph V. Miele, Mengqi Liu, David Shia, Sandeep Ahuja, Eric W. Buddrius +1 more 2025-05-27
12309966 Thermally conductive chamber with stiffening structure for thermal cooling assembly of semiconductor chip package under high loading force Jin Yang, Jimmy Chuang, Mengqi Liu, Ralph V. Miele, Sandeep Ahuja +1 more 2025-05-20
12309933 Magnetically secured semiconductor chip package loading assembly Timothy Glen Hanna, Xiaoning Ye, Sandeep Ahuja, Jacob McMillian, Ralph V. Miele +2 more 2025-05-20
12279395 Patterned bolster plate and composite back plate for semiconductor chip LGA package and cooling assembly retention Ralph V. Miele, David Shia, Jeffory L. Smalley, Eric W. Buddrius, Sean T. Sivapalan +2 more 2025-04-15
12133357 Cold plate architecture for liquid cooling of devices Jin Yang, David Shia, Mohanraj Prabhugoud, Olaotan ELENITOBA-JOHNSON, Craig Jahne 2024-10-29 $18,861,000
12131977 Electronic systems with inverted circuit board with heat sink to chassis attachment Barrett M. Faneuf, Kenan Arik, David Shia, Casey Winkel, Sandeep Ahuja +9 more 2024-10-29 $18,861,000
11984685 Retention latch with spring mechanism Xiang Li, George Vergis, Mani N. Prakash 2024-05-14 $33,809,000
11842943 Electronic systems with inverted circuit board with heat sink to chassis attachment Barrett M. Faneuf, Kenan Arik, David Shia, Casey Winkel, Sandeep Ahuja +9 more 2023-12-12 $45,136,000
11587597 Connector retention mechanism for improved structural reliability Xiang Li, George Vergis, Mani N. Prakash 2023-02-21 $13,703,000
11495518 Multi-surface heat sink suitable for multi-chip packages Shrenik Kothari, Sandeep Ahuja, Susan F. Smith, Jeffory L. Smalley, Francisco Gabriel Lozano Sanchez +5 more 2022-11-08 $15,080,000
10950958 Memory module connector, memory module, and pivotable latch Xiang Li, Mani N. Prakash, George Vergis 2021-03-16 $38,556,000
10888010 Retention of dual in-line memory modules George Vergis, Xiang Li 2021-01-05 $27,050,000
10790603 Connector with relaxation mechanism for latch Xiang Li, George Vergis, Mani N. Prakash 2020-09-29 $31,444,000
7208348 Methods of fabricating a via-in-pad with off-center geometry Stephen C. Joy 2007-04-24 $13,574,000
6833615 Via-in-pad with off-center geometry Stephen C. Joy 2004-12-21 $44,553,000
6622905 Design and assembly methodology for reducing bridging in bonding electronic components to pads connected to vias Daniel Edward Shier, Scott Dixon 2003-09-23 $27,638,000