Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Intel › John R. Goles
JG

John R. Goles — 12 Patents

Intel: 12 patents #3,451 of 30,777Top 15%
Folsom, CA: #203 of 1,500 inventorsTop 15%
California: #51,404 of 386,348 inventorsTop 15%
Overall (All Time): #396,045 of 4,157,543Top 10%
12 Patents All Time
John R. Goles has been granted 12 US patents while listed as an inventor at Intel. The first was granted in 2018 and the most recent in July 2025. John R. Goles ranks #396,045 of 4,157,543 US inventors in our database (top 9.5%). Patent records list John R. Goles in Folsom, CA, US.

Patents per Year

Patents granted per year, 2018 to 2025Bar chart with a peak of 4 patents in 2025.peak 42018: 1 patents20182019: 2 patents20192020: 1 patents20202021: 3 patents20212023: 1 patents20232025: 4 patents2025

Issued Patents All Time

Showing 1–12 of 12 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12367943 Reference voltage adjustment per path for high speed memory signaling Arvind Kumar, Dean-Dexter R. Eugenio 2025-07-22
12332812 Memory device manageability bus George Vergis 2025-06-17
12217787 Apparatus, system and method to detect and improve an input clock performance of a memory device Arvind Kumar, James A. McCall, Bill Nale, Dean-Dexter R. Eugenio 2025-02-04
12204751 Reference voltage training per path for high speed memory signaling Arvind Kumar, Dean-Dexter R. Eugenio, Santhosh Muskula 2025-01-21
11662926 Input/output (I/O) loopback function for I/O signaling testing Dean-Dexter R. Eugenio, Arvind Kumar, Christopher E. Cox 2023-05-30 $16,378,000
10969974 Power-based dynamic adjustment of memory module bandwidth George Vergis, Douglas Heymann, Dat Le 2021-04-06 $36,336,000
10969979 Input/output (I/O) loopback function for I/O signaling testing Dean-Dexter R. Eugenio, Arvind Kumar, Christopher E. Cox 2021-04-06 $36,336,000
10891243 Memory bus MR register programming process Tonia G. Morris, John V. Lovelace 2021-01-12 $55,416,000
10592445 Techniques to access or operate a dual in-line memory module via multiple data channels Bill Nale, Christopher E. Cox, Kuljit S. Bains, George Vergis, James A. McCall +3 more 2020-03-17 $21,927,000
10496309 Input/output (I/O) loopback function for I/O signaling testing Dean-Dexter R. Eugenio, Arvind Kumar, Christopher E. Cox 2019-12-03 $19,496,000
10380043 Memory bus MR register programming process Tonia G. Morris, John V. Lovelace 2019-08-13 $24,877,000
10146711 Techniques to access or operate a dual in-line memory module via multiple data channels Bill Nale, Kuljit S. Bains, George Vergis, Christopher E. Cox, James A. McCall +3 more 2018-12-04 $23,085,000

Frequent Collaborators

Dean-Dexter R. Eugenio6 shared
Arvind Kumar6 shared
Christopher E. Cox5 shared
George Vergis4 shared
James A. McCall3 shared
Bill Nale3 shared

Nearby-Ranked Inventors

John Patrick Hickey, III12
Gregory Lutter12
Josselin Xavier COUPARD12
Xuan Li12
Nandana Mihindukulasooriya12
Keiichi Matsuda12
Robert Imig12
Peter Mage12
Sze Ping Ching12