Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12321622 | Deferred ECC (error checking and correction) memory initialization by memory scrub hardware | Sreenivas Mandava | 2025-06-03 |
| 10891243 | Memory bus MR register programming process | Tonia G. Morris, John R. Goles | 2021-01-12 |
| 10621121 | Measurement and optimization of command signal timing margins | Christina Jue | 2020-04-14 |
| 10552643 | Fast boot up memory controller | Sreenivas Mandava, Debaleena Das | 2020-02-04 |
| 10380043 | Memory bus MR register programming process | Tonia G. Morris, John R. Goles | 2019-08-13 |
| 10347319 | Method and apparatus for dynamically adjusting voltage reference to optimize an I/O system | Christopher P. Mozak, Kevin B. Moore, Theodore Z. Schoenborn, Bryan L. Spry, Christopher E. Yunker | 2019-07-09 |
| 10148416 | Signal phase optimization in memory interface training | Tonia G. Morris, Ying Zhou, Alberto David Perez Guevara | 2018-12-04 |
| 9852021 | Method and apparatus for encoding registers in a memory module | Bill Nale, Murugasamy M. Nachimuthu, Tuan M. Quach | 2017-12-26 |
| 9627029 | Method for training a control signal based on a strobe signal in a memory module | Tonia G. Morris, Jonathan C. Jasper, Benjamin T. Tyson | 2017-04-18 |
| 9373365 | Method and apparatus for dynamically adjusting voltage reference to optimize an I/O system | Christopher P. Mozak, Kevin B. Moore, Theodore Z. Schoenborn, Bryan L. Spry, Christopher E. Yunker | 2016-06-21 |
| 9330734 | Method and apparatus for dynamically adjusting voltage reference to optimize an I/O system | Christopher P. Mozak, Kevin B. Moore, Theodore Z. Schoenborn, Bryan L. Spry, Christopher E. Yunker | 2016-05-03 |
| 9318182 | Apparatus, method and system to determine memory access command timing based on error detection | — | 2016-04-19 |
| 9025399 | Method for training a control signal based on a strobe signal in a memory module | Tonia G. Morris, Jonathan C. Jasper, Benjamin T. Tyson | 2015-05-05 |
| 8843732 | Mechanism for detecting a no-processor swap condition and modification of high speed bus calibration during boot | Mahesh S. Natu, Rajesh Banginwar | 2014-09-23 |
| 8819474 | Active training of memory command timing | Theodore Z. Schoenborn, Christopher P. Mozak, Bryan L. Spry | 2014-08-26 |
| 8601227 | Methods and apparatus for demand-based memory mirroring | Robert C. Swanson, Larry D. Aaron, Jr., Sugumar Govindarajan | 2013-12-03 |
| 8582374 | Method and apparatus for dynamically adjusting voltage reference to optimize an I/O system | Christopher P. Mozak, Kevin B. Moore, Zale Schoenborn, Bryan L. Spry, Chris Yunker | 2013-11-12 |
| 8331176 | Method and system for evaluating effects of signal phase difference on a memory system | Christopher P. Mozak, Kevin B. Moore, Zale Schoenborn, Bryan L. Spry, Christopher E. Yunker | 2012-12-11 |
| 7949850 | Methods and appratus for demand-based memory mirroring | Robert C. Swanson, Larry D. Aaron, Jr., Sugumar Govindarajan | 2011-05-24 |
| 7765409 | Modular BIOS update mechanism | Andrew H. Gafken, Todd D. Wilson, Tom Dodson | 2010-07-27 |
| 7305668 | Secure method to perform computer system firmware updates | Barry Kennedy, Mahesh S. Natu, Andrew J. Fish, Sharif S. Faraq | 2007-12-04 |
| 7213152 | Modular bios update mechanism | Andrew H. Gafken, Todd D. Wilson, Thomas Dodson | 2007-05-01 |
| 7107405 | Writing cached data to system management memory | — | 2006-09-12 |
| 7036007 | Firmware architecture supporting safe updates and multiple processor types | Todd Schelling, Amy O'Donnell, Craig M. Valine, William R. Greene, Bassam N. Elkhoury +1 more | 2006-04-25 |
| 6591352 | Method and apparatus for executing firmware from a valid startup block | John Lambino | 2003-07-08 |