Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9367328 | Out-of-band host OS boot sequence verification | Daniel Nemiroff, Paul J. Thadikaran, Purushottam Goel, Nicholas D. Triantafillou, Paritosh Saxena +1 more | 2016-06-14 |
| 9158916 | Unauthorized access and/or instruction prevention, detection, and/or remediation, at least in part, by storage processor | Daniel Nemiroff, Paul J. Thadikaran, Paritosh Saxena, Nicholas D. Triantafillou | 2015-10-13 |
| 7765409 | Modular BIOS update mechanism | Todd D. Wilson, Tom Dodson, John V. Lovelace | 2010-07-27 |
| 7376870 | Self-monitoring and updating of firmware over a network | Mukesh Kataria, William A. Stevens | 2008-05-20 |
| 7213152 | Modular bios update mechanism | Todd D. Wilson, Thomas Dodson, John V. Lovelace | 2007-05-01 |
| 7174416 | Method of performing reliable updates in a symmetrically blocked nonvolatile memory having a bifurcated storage architecture | Robert Nasry Hasbun, David A. Edwards, Christopher J. Spiegel | 2007-02-06 |
| 6836853 | Non-volatile memory based monotonic counter | Lance W. Dover | 2004-12-28 |
| 6711675 | Protected boot flow | Christopher J. Spiegel, Robert P. Hale, William A. Stevens | 2004-03-23 |
| 6622200 | Method of performing reliable updates in a symmetrically blocked nonvolatile memory having a bifurcated storage architecture | Robert Nasry Hasbun, David A. Edwards, Christopher J. Spiegel | 2003-09-16 |
| 6311290 | Methods of reliably allocating, de-allocating, re-allocating, and reclaiming objects in a symmetrically blocked nonvolatile memory having a bifurcated storage architecture | Robert Nasry Hasbun, David A. Edwards, Christopher J. Spiegel | 2001-10-30 |
| 6182188 | Method of performing reliable updates in a symmetrically blocked nonvolatile memory having a bifurcated storage architecture | Robert Nasry Hasbun, David A. Edwards, Christopher J. Spiegel | 2001-01-30 |
| 6157970 | Direct memory access system using time-multiplexing for transferring address, data, and control and a separate control line for serially transmitting encoded DMA channel number | Joseph A. Bennett, David I. Poisner | 2000-12-05 |
| 6151654 | Method and apparatus for encoded DMA acknowledges | David I. Poisner, Joseph A. Bennett | 2000-11-21 |
| 6131127 | I/O transactions on a low pin count bus | Joseph A. Bennett, David I. Poisner | 2000-10-10 |
| 6119189 | Bus master transactions on a low pin count bus | Joseph A. Bennett, David I. Poisner | 2000-09-12 |
| 6026016 | Methods and apparatus for hardware block locking in a nonvolatile memory | — | 2000-02-15 |
| 5991841 | Memory transactions on a low pin count bus | Joseph A. Bennett, David I. Poisner | 1999-11-23 |
| 5937434 | Method of managing a symmetrically blocked nonvolatile memory having a bifurcated storage architecture | Robert Nasry Hasbun, David A. Edwards | 1999-08-10 |
| 5893135 | Flash memory array with two interfaces for responding to RAS and CAS signals | Robert Nasry Hasbun | 1999-04-06 |
| 5778412 | Method and apparatus for interfacing a data bus to a plurality of memory devices | — | 1998-07-07 |
| 5708799 | PCMCIA autoconfigure PC card | H. John McGrath | 1998-01-13 |