Issued Patents All Time
Showing 26–50 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8171331 | Memory channel having deskew separate from redrive | — | 2012-05-01 |
| 8135999 | Disabling outbound drivers for a last memory buffer on a memory channel | Warren R. Morrow, Dennis W. Brzezinski | 2012-03-13 |
| 8098783 | Training pattern for a biased clock recovery tracking loop | Adarsh Panikkar, Kersi H. Vakil | 2012-01-17 |
| 8020056 | Memory channel with bit lane fail-over | Dennis W. Brzezinski, Warren R. Morrow | 2011-09-13 |
| 7827462 | Combined command and data code | — | 2010-11-02 |
| 7761753 | Memory channel with bit lane fail-over | Dennis W. Brzezinski, Warren R. Morrow | 2010-07-20 |
| 7702874 | Memory device identification | — | 2010-04-20 |
| 7650558 | Systems, methods, and apparatuses for using the same memory type for both error check and non-error check memory systems | Mark Rosenbluth | 2010-01-19 |
| 7516349 | Synchronized memory channels with unidirectional links | James W. Alexander, Rajat Agarwal | 2009-04-07 |
| 7464241 | Memory transaction burst operation and memory components supporting temporally multiplexed error correction coding | — | 2008-12-09 |
| 7447953 | Lane testing with variable mapping | — | 2008-11-04 |
| 7417883 | I/O data interconnect reuse as repeater | — | 2008-08-26 |
| 7395485 | Check codes mapped across multiple frames | — | 2008-07-01 |
| 7386768 | Memory channel with bit lane fail-over | Dennis W. Brzezinski, Warren R. Morrow | 2008-06-10 |
| 7383399 | Method and apparatus for memory compression | — | 2008-06-03 |
| 7369634 | Training pattern for a biased clock recovery tracking loop | Adarsh Panikkar, Kersi H. Vakil | 2008-05-06 |
| 7366931 | Memory modules that receive clock information and are placed in a low power state | — | 2008-04-29 |
| 7343458 | Memory channel with unidirectional links | — | 2008-03-11 |
| 7340537 | Memory channel with redundant presence detect | — | 2008-03-04 |
| 7268020 | Embedded heat spreader | — | 2007-09-11 |
| 7243205 | Buffered memory module with implicit to explicit memory command expansion | Chris Freeman, Kuljit S. Bains, Robert M. Ellis, John B. Halbert, Michael W. Williams | 2007-07-10 |
| 7219294 | Early CRC delivery for partial frame | — | 2007-05-15 |
| 7212423 | Memory agent core clock aligned to lane | — | 2007-05-01 |
| 7200787 | Memory channel utilizing permuting status patterns | James W. Alexander | 2007-04-03 |
| 7194581 | Memory channel with hot add/remove | — | 2007-03-20 |