| 8098783 |
Training pattern for a biased clock recovery tracking loop |
Kersi H. Vakil, Pete D. Vogt |
2012-01-17 |
| 7672335 |
Non-integer word size translation through rotation of different buffer alignment channels |
Wayne C. Ashby, Abhimanyu Kolla |
2010-03-02 |
| 7656983 |
Dual clock domain deskew circuit |
Daniel Klowden, S. Reji Kumar, Kersi H. Vakil, Abhimanyu Kolla |
2010-02-02 |
| 7500131 |
Training pattern based de-skew mechanism and frame alignment |
S. Reji Kumar, Daniel Klowden, Abhimanyu Kolla |
2009-03-03 |
| 7466723 |
Various methods and apparatuses for lane to lane deskewing |
Kersi H. Vakil |
2008-12-16 |
| 7369634 |
Training pattern for a biased clock recovery tracking loop |
Kersi H. Vakil, Pete D. Vogt |
2008-05-06 |
| 7346795 |
Delaying lanes in order to align all lanes crossing between two clock domains |
Daniel Klowden, S. Reji Kumar |
2008-03-18 |
| 7043392 |
Interpolator testing system |
Kersi H. Vakil, Abhimanyu Kolla, Arnaud J. Forestier |
2006-05-09 |
| 7009431 |
Interpolator linearity testing system |
Kersi H. Vakil, Abhimanyu Kolla, Arnaud J. Forestier |
2006-03-07 |