CP

Chinna Prudvi

IN Intel: 17 patents #2,418 of 30,777Top 8%
Overall (All Time): #274,343 of 4,157,543Top 7%
17
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10198333 Test, validation, and debug architecture Mark B. Trobough, Keshavan Tiruvallur, Christian Iovin, David W. Grawrock, Jay Nejedlo +37 more 2019-02-05
8122194 Transaction manager and cache for processing agent Derek T. Bachand 2012-02-21
7555603 Transaction manager and cache for processing agent Derek T. Bachand 2009-06-30
7143242 Dynamic priority external transaction system David L. Hill, Derek T. Bachand, Deborah T. Marr 2006-11-28
6735675 Method and apparatus for altering data length to zero to maintain cache coherency Paul Breuder, Derek T. Bachand, David L. Hill 2004-05-11
6654837 Dynamic priority external transaction system David L. Hill, Derek T. Bachand, Deborah T. Marr 2003-11-25
6578114 Method and apparatus for altering data length to zero to maintain cache coherency Paul Breuder, Derek T. Bachand, David L. Hill 2003-06-10
6557081 Prefetch queue David L. Hill 2003-04-29
6484239 Prefetch queue David L. Hill 2002-11-19
6434677 Method and apparatus for altering data length to zero to maintain cache coherency Paul Breuder, Derek T. Bachand, David L. Hill 2002-08-13
6412091 Error correction system in a processing agent having minimal delay David L. Hill, Derek T. Bachand, Paul Breuder 2002-06-25
6401172 Recycle mechanism for a processing agent Derek T. Bachand, David L. Hill 2002-06-04
6378048 “SLIME” cache coherency system for agents with multi-layer caches Paul Breuder, Quinn W. Merrill, Derek T. Bachand, Harish Kumar, Brent E. Lince 2002-04-23
6269465 Error correction system in a processing agent having minimal delay David L. Hill, Derek T. Bachand, Paul Breuder 2001-07-31
6216208 Prefetch queue responsive to read request sequences Robert Greiner, David L. Hill, Derek T. Bachand, Matthew A. Fisch 2001-04-10
6209068 Read line buffer and signaling protocol for processor David L. Hill, Derek T. Bachand, Matthew A. Fisch 2001-03-27
6078981 Transaction stall technique to prevent livelock in multiple-processor systems David L. Hill, Derek T. Bachand, Paul Breuder, Matthew A. Fisch 2000-06-20