Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for altering data length to zero to maintain cache coherency

Method and apparatus for altering data length to zero to maintain cache coherency

US Patent 6735675 · Granted May 11, 2004

Estimated economic value: $33,328,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Tracking repeated reads to guide dynamic selection of cache coherence protocols 2022
Maintaining domain coherence states including domain state no-owned (DSN) in pro2022
Providing dynamic selection of cache coherence protocols in processor-based devi2021
Enabling atomic memory accesses across coherence granule boundaries in processor2021
Test, validation, and debug architecture2019
Low overhead hierarchical connectivity of cache coherent agents to a coherent fa2018
Railroad signaling and communication system using a fail-safe voltage sensor to 2016
Railroad signaling and communication system using a fail-safe voltage sensor to 2015
Communicating via an in-die interconnect2012
Communicating via an in-die interconnect2012
Transaction manager and cache for processing agent2012
Transaction manager and cache for processing agent2012