PH

Philip Hillier

IBM: 22 patents #4,909 of 70,183Top 7%
IN Intel: 5 patents #7,174 of 30,777Top 25%
Overall (All Time): #145,280 of 4,157,543Top 4%
27
Patents All Time

Issued Patents All Time

Showing 25 most recent of 27 patents

Patent #TitleCo-InventorsDate
11404105 Write disturb refresh rate reduction using write history buffer Akanksha Mehta, Benjamin Graniello, Rakan Maddah, Richard P. Mangold, Prashant S. Damle +1 more 2022-08-02
11188264 Configurable write command delay in nonvolatile memory Shekoufeh Qawami, Benjamin Graniello, Rajesh Sundaram 2021-11-30
10310989 Time tracking with patrol scrub Jeffrey W. Ryden, Muthukumar P. Swaminathan, Zion S. Kwok, Kunal A. Khochare, Richard P. Mangold +1 more 2019-06-04
9934859 Determining demarcation voltage via timestamps Muthukumar P. Swaminathan, Zion S. Kwok, Prashant S. Damle, Kunal A. Khochare, Jeffrey W. Ryden +1 more 2018-04-03
9691492 Determination of demarcation voltage for managing drift in non-volatile memory devices Bruce Querbach, Zion S. Kwok, Christopher Connor, Jeffrey W. Ryden 2017-06-27
8897301 Multicast bandwidth multiplication for a unified distributed switch Claude Basso, Todd A. Greenfield, Mark L. Rudquist, Kenneth M. Valk, Brian T. Vanderpool +1 more 2014-11-25
8879553 Multicast bandwidth multiplication for a unified distributed switch Claude Basso, Todd A. Greenfield, Mark L. Rudquist, Kenneth M. Walk, Brian T. Vanderpool +1 more 2014-11-04
8103930 Apparatus for implementing processor bus speculative data completion Wayne M. Barrett, Joseph A. Kirscht, Elizabeth A. McGlone 2012-01-24
8082396 Selecting a command to send to memory Herman L. Blackmon, Joseph A. Kirscht, Brian T. Vanderpool 2011-12-20
7970980 Method and apparatus for accessing memory in a computer system architecture supporting heterogeneous configurations of memory structures Joseph A. Kirscht, Jamie R. Kuesel 2011-06-28
7949836 Memory controller and method for copying mirrored memory that allows processor accesses to memory during a mirror copy operation Joseph A. Kirscht, Elizabeth A. McGlone 2011-05-24
7908443 Memory controller and method for optimized read/modify/write performance William Paul Hovis, Joseph A. Kirscht 2011-03-15
7899940 Servicing commands Joseph A. Kirscht 2011-03-01
7516270 Memory controller and method for scrubbing memory without using explicit atomic operations Joseph A. Kirscht, Elizabeth A. McGlone 2009-04-07
7496707 Dynamically scalable queues for performance driven PCI express memory traffic Ronald E. Freking, Curtis C. Wollbrink 2009-02-24
7475202 Memory controller and method for optimized read/modify/write performance William Paul Hovis, Joseph A. Kirscht 2009-01-06
7472236 Managing mirrored memory transactions and error recovery Joseph A. Kirscht, Elizabeth A. McGlone 2008-12-30
7467260 Method and apparatus to purge remote node cache lines to support hot node replace in a computing system Duane A. Averill, John Michael Borkenhagen 2008-12-16
7426672 Method for implementing processor bus speculative data completion Wayne M. Barrett, Joseph A. Kirscht, Elizabeth A. McGlone 2008-09-16
7346713 Methods and apparatus for servicing commands through a memory controller port Joseph A. Kirscht 2008-03-18
7328315 System and method for managing mirrored memory transactions and error recovery Joseph A. Kirscht, Elizabeth A. McGlone 2008-02-05
7328317 Memory controller and method for optimized read/modify/write performance William Paul Hovis, Joseph A. Kirscht 2008-02-05
7257686 Memory controller and method for scrubbing memory without using explicit atomic operations Joseph A. Kirscht, Elizabeth A. McGlone 2007-08-14
7251185 Methods and apparatus for using memory John Michael Borkenhagen, Sudhir Dhawan, Joseph A. Kirscht, Randolph S. Kolvick 2007-07-31
7096289 Sender to receiver request retry method and apparatus Jeffrey Douglas Brown 2006-08-22