| 12505065 |
On-package die-to-die (D2D) interconnect for memory using universal chiplet interconnect express (UCIe) PHY |
Debendra Das Sharma, Peter Z. Onufryk, Swadesh Choudhary, Gerald Pasdast, Zuoguo Wu +2 more |
2025-12-23 |
|
| 12499019 |
Retimers to extend a die-to-die interconnect |
Debendra Das Sharma, Swadesh Choudhary, Sridhar Muthrasanallur, Zuoguo Wu, Gerald Pasdast +1 more |
2025-12-16 |
|
| 12499074 |
Die-to-die interconnect protocol layer |
Debendra Das Sharma, Swadesh Choudhary, Lakshmi Narasimhan Seshan, Gerald Pasdast, Zuoguo Wu |
2025-12-16 |
|
| 12481614 |
Standard interfaces for die to die (D2D) interconnect stacks |
Debendra Das Sharma, Swadesh Choudhary, Zuoguo Wu, Gerald Pasdast, Lakshmi Narasimhan Seshan |
2025-11-25 |
|
| 12468597 |
Valid signal for latency sensitive die-to-die (D2D) interconnects |
Debendra Das Sharma, Lakshmi Narasimhan Seshan, Swadesh Choudhary, Zuoguo Wu, Gerald Pasdast |
2025-11-11 |
|
| 12405912 |
Link initialization training and bring up for die-to-die interconnect |
Lakshmipriya Seshan, Swadesh Choudhary, Debendra Das Sharma, Zuoguo Wu, Gerald Pasdast |
2025-09-02 |
|
| 12360934 |
Parameter exchange for a die-to-die interconnect |
Debendra Das Sharma, Mahesh S. Natu, Sridhar Muthrasanallur, Swadesh Choudhary, Lakshmipriya Seshan |
2025-07-15 |
|
| 12362306 |
Clock-gating in die-to-die (D2D) interconnects |
Debendra Das Sharma, Lakshmipriya Seshan, Gerald Pasdast, Zuoguo Wu, Swadesh Choudhary |
2025-07-15 |
|
| 12353305 |
Compliance and debug testing of a die-to-die interconnect |
Swadesh Choudhary, Debendra Das Sharma, Lakshmipriya Seshan, Zuoguo Wu, Gerald Pasdast |
2025-07-08 |
|
| 12347818 |
Logic die in a multi-chip package having a configurable physical interface to on-package memory |
Lohit Yerva, Mohammad Mamunur Rashid, Kuljit S. Bains |
2025-07-01 |
|
| 12332826 |
Die-to-die interconnect |
Debendra Das Sharma, Swadesh Choudhary, Lakshmipriya Seshan, Gerald Pasdast, Zuoguo Wu |
2025-06-17 |
|
| 12321305 |
Sideband interface for die-to-die interconnects |
Swadesh Choudhary, Debendra Das Sharma, Lakshmipriya Seshan, Zuoguo Wu, Gerald Pasdast |
2025-06-03 |
|
| 12316343 |
PHY-based retry techniques for die-to-die interfaces |
Lakshmipriya Seshan, Debendra Das Sharma, Zuoguo Wu, Gerald Pasdast |
2025-05-27 |
|
| 12181966 |
Reduction of latency impact of on-die error checking and correction (ECC) |
Kuljit S. Bains |
2024-12-31 |
$16,542,000 |
| 12117960 |
Approximate data bus inversion technique for latency sensitive applications |
Lakshmipriya Seshan, Gerald Pasdast, Zuoguo Wu |
2024-10-15 |
$19,078,000 |
| 11971841 |
Link layer-PHY interface adapter |
Swadesh Choudhary, Mahesh Wagh, Lakshmipriya Seshan |
2024-04-30 |
$26,151,000 |
| 11954360 |
Technology to provide accurate training and per-bit deskew capability for high bandwidth memory input/output links |
Kuljit S. Bains, Lohit Yerva |
2024-04-09 |
$27,197,000 |
| 11599497 |
High performance interconnect |
Zuoguo Wu, Debendra Das Sharma, Mohiuddin M. Mazumder, Jong-Ru Guo, Anupriya Sriramulu +2 more |
2023-03-07 |
$16,825,000 |
| 10789201 |
High performance interconnect |
Zuoguo Wu, Debendra Das Sharma, Mohiuddin M. Mazumder, Jong-Ru Guo, Anupriya Sriramulu +2 more |
2020-09-29 |
$31,444,000 |
| 10560081 |
Method, apparatus, system for centering in a high performance interconnect |
Mahesh Wagh, Zuoguo Wu, Venkatraman Iyer, Gerald Pasdast, Todd Hinck +1 more |
2020-02-11 |
$33,267,000 |
| 9692402 |
Method, apparatus, system for centering in a high performance interconnect |
Mahesh Wagh, Zuoguo Wu, Venkatraman Iyer, Gerald Pasdast, Todd Hinck +1 more |
2017-06-27 |
$7,334,000 |
