Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
PO

Peter Z. Onufryk — 45 Patents

PMPmc-Sierra: 14 patents #12 of 275Top 5%
ITIntegrated Device Technology: 13 patents #27 of 758Top 4%
ATAT&T: 8 patents #2,291 of 18,772Top 15%
M(Microsemi Storage Solutions (U.S.): 4 patents #7 of 64Top 15%
M(Microsemi Solutions (Us): 3 patents #4 of 63Top 7%
Flanders, NJ: #2 of 194 inventorsTop 2%
New Jersey: #1,118 of 69,400 inventorsTop 2%
Overall (All Time): #64,393 of 4,157,543Top 2%
45 Patents All Time
Peter Z. Onufryk has been granted 45 US patents while listed as an inventor at Integrated Device Technology. The first was granted in 1999 and the most recent in December 2025. Peter Z. Onufryk ranks #64,393 of 4,157,543 US inventors in our database (top 1.5%). Patent records list Peter Z. Onufryk in Flanders, NJ, US.

Issued Patents All Time

Showing 1–25 of 45 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12505065 On-package die-to-die (D2D) interconnect for memory using universal chiplet interconnect express (UCIe) PHY Debendra Das Sharma, Narasimha Lanka, Swadesh Choudhary, Gerald Pasdast, Zuoguo Wu +2 more 2025-12-23
10410975 Processed wafer of scalable electrical circuits, method for making same, and device comprising scaled electrical circuits Bruce Scatchard, Chunfang Xie 2019-09-10
10230396 Method and apparatus for layer-specific LDPC decoding Rino Micheloni, Alessia Marelli, Christopher I. W. Norrie 2019-03-12
9813080 Layer specific LDPC decoder Rino Micheloni, Alessia Marelli, Christopher I. W. Norrie 2017-11-07
9590656 System and method for higher quality log likelihood ratios in LDPC decoding Rino Micheloni, Alessia Marelli, Christopher I. W. Norrie, Ihab Jaser, Luca Crippa 2017-03-07
9454414 System and method for accumulating soft information in LDPC decoding Rino Micheloni, Alessia Marelli, Christopher I. W. Norrie, Ihab Jaser, Luca Crippa 2016-09-27
9448881 Memory controller and integrated circuit device for correcting errors in data read from memory cells Rino Micheloni, Alessia Marelli, Christopher I. W. Norrie, Ihab Jaser 2016-09-20
9397701 System and method for lifetime specific LDPC decoding Rino Micheloni, Alessia Marelli, Christopher I. W. Norrie 2016-07-19
9235467 System and method with reference voltage partitioning for low density parity check decoding Rino Micheloni, Alessia Marelli 2016-01-12 $12,303,000
9146890 Method and apparatus for mapped I/O routing in an interconnect switch David Alan Brown 2015-09-29
9128858 Apparatus and method for adjusting a correctable raw bit error rate limit in a memory system using strong log-likelihood (LLR) values Rino Micheloni, Alessia Marelli, Christopher I. W. Norrie, Ihab Jaser 2015-09-08 $3,456,000
9092353 Apparatus and method based on LDPC codes for adjusting a correctable raw bit error rate limit in a memory system Rino Micheloni, Alessia Marelli, Christopher I. W. Norrie, Ihab Jaser 2015-07-28 $2,474,000
9025495 Flexible routing engine for a PCI express switch and method of use David Alan Brown, Cesar A. Talledo 2015-05-05
8995302 Method and apparatus for translated routing in an interconnect switch David Alan Brown, Cesar A. Talledo 2015-03-31 $3,025,000
8990661 Layer specific attenuation factor LDPC decoder Rino Micheloni, Alessia Marelli, Christopher I. W. Norrie 2015-03-24 $1,724,000
8707122 Nonvolatile memory controller with two-stage error correction technique for enhanced reliability Rino Micheloni, Alessia Marelli, Christopher I. W. Norrie 2014-04-22 $9,231,000
8694849 Shuffler error correction code system and method Rino Micheloni, Alessia Marelli 2014-04-08 $2,257,000
8656071 System and method for routing a data message through a message network Ganesh T. Seshan 2014-02-18 $4,599,000
8656257 Nonvolatile memory controller with concatenated error correction codes Rino Micheloni, Alessia Marelli, Christopher I. W. Norrie 2014-02-18 $4,599,000
8621318 Nonvolatile memory controller with error detection for concatenated error correction codes Rino Micheloni, Alessia Marelli, Christopher I. W. Norrie 2013-12-31 $8,354,000
8601346 System and method for generating parity data in a nonvolatile memory controller by using a distributed processing technique Inna Levit 2013-12-03 $2,850,000
8588228 Nonvolatile memory controller with host controller interface for retrieving and dispatching nonvolatile memory commands in a distributed manner Jayesh Patel, Ihab Jaser, Ganesh T. Seshan 2013-11-19 $4,174,000
8554968 Interrupt technique for a nonvolatile memory controller Jayesh Patel, Ihab Jaser 2013-10-08 $8,227,000
8429325 PCI express switch and method for multi-port non-transparent switching Cesar A. Talledo 2013-04-23 $2,443,000
8397144 BCH data correction system and method Christopher I. W. Norrie, Alessia Marelli, Rino Micheloni 2013-03-12 $4,006,000