Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Nonvolatile memory controller with two-stage error correction technique for enhanced reliability

Nonvolatile memory controller with two-stage error correction technique for enhanced reliability

US Patent 8707122 · Granted Apr 22, 2014

Estimated economic value: $9,231,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

On-package die-to-die (D2D) interconnect for memory using universal chiplet inte2025
Method and apparatus for performing a neural network operation2025
Processor having switch instruction circuit2025
Partitionable neural network for solid state drives2025
Method and apparatus for gather/scatter operations in a vector processor2024
Regression neural network for identifying threshold voltages to be used in reads2024
Machine learning assisted quality of service (QoS) for solid state drives2024
Method and apparatus for desynchronizing execution in a vector processor2023
Method and apparatus for performing a read of a flash memory using predicted ret2023
Method and apparatus for reading a flash memory device2022
Method and apparatus for outlier management2022
Method and apparatus for determining when actual wear of a flash memory device d2022