Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
AM

Alessia Marelli — 29 Patents

PMPmc-Sierra: 9 patents #23 of 145Top 20%
M(Microsemi Storage Solutions (U.S.): 6 patents #4 of 64Top 7%
M(Microsemi Solutions (Us): 4 patents #2 of 63Top 4%
IGIp Gem Group: 4 patents #2 of 9Top 25%
Micron: 3 patents #3,118 of 6,374Top 50%
ITIntegrated Device Technology: 1 patents #441 of 758Top 60%
SSStmicroelectronics Sa: 1 patents #3,591 of 4,662Top 80%
Dalmine, IT: #1 of 90 inventorsTop 2%
Overall (All Time): #127,851 of 4,157,543Top 4%
29 Patents All Time
Alessia Marelli has been granted 29 US patents. The first was granted in 2008 and the most recent in January 2021. Alessia Marelli ranks #127,851 of 4,157,543 US inventors in our database (top 3.1%). Patent records list Alessia Marelli in Dalmine, IT.

Issued Patents All Time

Showing 1–25 of 29 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10891083 System and method for randomizing data Unnikrishnan Sivaraman Nair, Rino Micheloni 2021-01-12
10630317 Method for performing error corrections of digital information codified as a symbol sequence Massimiliano Lunelli, Rino Micheloni, Roberto Ravasio 2020-04-21 $19,831,000
10332613 Nonvolatile memory system with retention monitor Rino Micheloni, Robert Scott Fryman 2019-06-25
10291263 Auto-learning log likelihood ratio Rino Micheloni 2019-05-14
10283215 Nonvolatile memory system with background reference positioning and local reference positioning Rino Micheloni, Ron Cohen, Amir Mosek, Eran Kirzner 2019-05-07
10230396 Method and apparatus for layer-specific LDPC decoding Rino Micheloni, Peter Z. Onufryk, Christopher I. W. Norrie 2019-03-12
10157677 Background reference positioning and local reference positioning using threshold voltage shift read Rino Micheloni 2018-12-18
9813080 Layer specific LDPC decoder Rino Micheloni, Peter Z. Onufryk, Christopher I. W. Norrie 2017-11-07
9799405 Nonvolatile memory system with read circuit for performing reads using threshold voltage shift read instruction Rino Micheloni, Stephen Bates 2017-10-24
9590656 System and method for higher quality log likelihood ratios in LDPC decoding Rino Micheloni, Peter Z. Onufryk, Christopher I. W. Norrie, Ihab Jaser, Luca Crippa 2017-03-07
9454414 System and method for accumulating soft information in LDPC decoding Rino Micheloni, Peter Z. Onufryk, Christopher I. W. Norrie, Ihab Jaser, Luca Crippa 2016-09-27
9450610 High quality log likelihood ratios determined using two-index look-up table Rino Micheloni, Christopher I. W. Norrie 2016-09-20
9448881 Memory controller and integrated circuit device for correcting errors in data read from memory cells Rino Micheloni, Peter Z. Onufryk, Christopher I. W. Norrie, Ihab Jaser 2016-09-20
9417804 System and method for memory block pool wear leveling Rino Micheloni, Luca Crippa 2016-08-16
9397701 System and method for lifetime specific LDPC decoding Rino Micheloni, Peter Z. Onufryk, Christopher I. W. Norrie 2016-07-19
9235467 System and method with reference voltage partitioning for low density parity check decoding Rino Micheloni, Peter Z. Onufryk 2016-01-12 $12,303,000
9128858 Apparatus and method for adjusting a correctable raw bit error rate limit in a memory system using strong log-likelihood (LLR) values Rino Micheloni, Peter Z. Onufryk, Christopher I. W. Norrie, Ihab Jaser 2015-09-08 $3,456,000
9092353 Apparatus and method based on LDPC codes for adjusting a correctable raw bit error rate limit in a memory system Rino Micheloni, Peter Z. Onufryk, Christopher I. W. Norrie, Ihab Jaser 2015-07-28 $2,474,000
8990661 Layer specific attenuation factor LDPC decoder Rino Micheloni, Peter Z. Onufryk, Christopher I. W. Norrie 2015-03-24 $1,724,000
8966335 Method for performing error corrections of digital information codified as a symbol sequence Massimiliano Lunelli, Rino Micheloni, Roberto Ravasio 2015-02-24 $6,756,000
8707122 Nonvolatile memory controller with two-stage error correction technique for enhanced reliability Rino Micheloni, Peter Z. Onufryk, Christopher I. W. Norrie 2014-04-22 $9,231,000
8694849 Shuffler error correction code system and method Rino Micheloni, Peter Z. Onufryk 2014-04-08 $2,257,000
8694855 Error correction code technique for improving read stress endurance Rino Micheloni, Luca Crippa 2014-04-08 $2,257,000
8656257 Nonvolatile memory controller with concatenated error correction codes Rino Micheloni, Peter Z. Onufryk, Christopher I. W. Norrie 2014-02-18 $4,599,000
8621318 Nonvolatile memory controller with error detection for concatenated error correction codes Rino Micheloni, Peter Z. Onufryk, Christopher I. W. Norrie 2013-12-31 $8,354,000