Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10630317 | Method for performing error corrections of digital information codified as a symbol sequence | Massimiliano Lunelli, Rino Micheloni, Alessia Marelli | 2020-04-21 |
| 8966335 | Method for performing error corrections of digital information codified as a symbol sequence | Massimiliano Lunelli, Rino Micheloni, Alessia Marelli | 2015-02-24 |
| 8572361 | Configuration of a multilevel flash memory device | Angelo Bovino, Rino Micheloni | 2013-10-29 |
| 8347201 | Reading method of a memory device with embedded error-correcting code and memory device with embedded error-correcting code | Alessia Marelli, Valeria Intini, Rino Micheloni | 2013-01-01 |
| 8065467 | Non-volatile, electrically-programmable memory | Rino Micheloni | 2011-11-22 |
| 7940575 | Memory device and method providing logic connections for data transfer | Andreas Kux, Detlev Richter, Girolamo Gallo, Josef Willer, Ramirez Xavier Veredas | 2011-05-10 |
| 7937576 | Configuration of a multi-level flash memory device | Angelo Bovino, Rino Micheloni | 2011-05-03 |
| 7908543 | Reading method of a memory device with embedded error-correcting code and memory device with embedded error-correcting code | Alessia Marelli, Valeria Intini, Rino Micheloni | 2011-03-15 |
| 7800943 | Integrated circuit having a memory cell arrangement and method for reading a memory cell state using a plurality of partial readings | Detlev Richter, Gert Koebernik, Girolamo Gallo, Mirko Reissmann, Ramirez Xavier Veredas | 2010-09-21 |
| 7730357 | Integrated memory system | Rino Micheloni | 2010-06-01 |
| 7719894 | Method of programming cells of a NAND memory device | Luca Crippa, Rino Micheloni | 2010-05-18 |
| 7581153 | Memory with embedded error correction codes | Rino Micheloni, Angelo Bovino, Vincenzo Altieri | 2009-08-25 |
| 7529136 | Method for compacting the erased threshold voltage distribution of flash memory devices during writing operations | Rino Micheloni, Luca Crippa, Federico Pio | 2009-05-05 |
| 7394694 | Flash memory device with NAND architecture with reduced capacitive coupling effect | Rino Micheloni, Ilaria Motta | 2008-07-01 |
| 7382660 | Method for accessing a multilevel nonvolatile memory device of the flash NAND type | Angelo Bovino, Vincenzo Altieri, Rino Micheloni, Mario De Matteis | 2008-06-03 |
| 7366014 | Double page programming system and method | Rino Micheloni, Luca Crippa | 2008-04-29 |
| 7362616 | NAND flash memory with erase verify based on shorter evaluation time | Angelo Bovino, Rino Micheloni | 2008-04-22 |
| 7336538 | Page buffer circuit and method for multi-level NAND programmable memories | Luca Crippa, Chiara Missiroli, Rino Micheloni, Angelo Bovino | 2008-02-26 |
| 7328397 | Method for performing error corrections of digital information codified as a symbol sequence | Massimiliano Lunelli, Rino Micheloni, Alessia Marelli | 2008-02-05 |
| 7221602 | Memory system comprising a semiconductor memory | Rino Micheloni | 2007-05-22 |
| 7068540 | Method and device for programming an electrically programmable non-volatile semiconductor memory | Rino Micheloni | 2006-06-27 |
| 7035142 | Non volatile memory device including a predetermined number of sectors | Osama Khouri, Rino Micheloni, Giovanni Campardo | 2006-04-25 |
| 7031193 | Method and device for programming an electrically programmable non-volatile semiconductor memory | Rino Micheloni, Salvatrice Scommegna | 2006-04-18 |
| 7017099 | Method for error control in multilevel cells with configurable number of stored bits | Rino Micheloni, Massimiliano Picca, Stefano Zanardi | 2006-03-21 |
| 6956773 | Circuit for programming a non-volatile memory device with adaptive program load control | Rino Micheloni | 2005-10-18 |