Issued Patents All Time
Showing 25 most recent of 83 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12277969 | Auto-referenced memory cell read techniques | Graziano Mirichigni, Paolo Amato, Alessandro Orlando, Marco Sforzin | 2025-04-15 |
| 12249370 | Systems and techniques for accessing multiple memory cells concurrently | — | 2025-03-11 |
| 12131916 | Semiconductor packages with patterns of die-specific information | — | 2024-10-29 |
| 12009028 | Auto-referenced memory cell read techniques | Graziano Mirichigni, Paolo Amato, Alessandro Orlando, Marco Sforzin | 2024-06-11 |
| 11705194 | Systems and techniques for accessing multiple memory cells concurrently | — | 2023-07-18 |
| 11532490 | Semiconductor packages with indications of die-specific information | — | 2022-12-20 |
| 11360868 | Redundant cloud memory storage for a memory subsystem | — | 2022-06-14 |
| 11335402 | Systems and techniques for accessing multiple memory cells concurrently | — | 2022-05-17 |
| 11282574 | Auto-referenced memory cell read techniques | Graziano Mirichigni, Paolo Amato, Alessandro Orlando, Marco Sforzin | 2022-03-22 |
| 11031258 | Semiconductor packages with patterns of die-specific information | — | 2021-06-08 |
| 10896727 | Auto-referenced memory cell read techniques | Graziano Mirichigni, Paolo Amato, Alessandro Orlando, Marco Sforzin | 2021-01-19 |
| 10600480 | Auto-referenced memory cell read techniques | Graziano Mirichigni, Paolo Amato, Alessandro Orlando, Marco Sforzin | 2020-03-24 |
| 10452541 | Nonvolatile storage using low latency and high latency memory | — | 2019-10-22 |
| 10431301 | Auto-referenced memory cell read techniques | Graziano Mirichigni, Paolo Amato, Alessandro Orlando, Marco Sforzin | 2019-10-01 |
| 10114746 | Nonvolatile storage using low latency and high latency memory | — | 2018-10-30 |
| 10102891 | Double-polarity memory read | Innocenzo Tortorelli | 2018-10-16 |
| 9799381 | Double-polarity memory read | Innocenzo Tortorelli | 2017-10-24 |
| 9595667 | Three dimensional memory array architecture | — | 2017-03-14 |
| 9444046 | Three dimensional memory array architecture | — | 2016-09-13 |
| 9437254 | Method of dynamically selecting memory cell capacity | — | 2016-09-06 |
| 9252362 | Method for making three dimensional memory array architecture using phase change and ovonic switching materials | — | 2016-02-02 |
| 9076524 | Method of accessing a memory device | — | 2015-07-07 |
| 8841649 | Three dimensional memory array architecture | — | 2014-09-23 |
| 8824213 | Method of using memory instruction including parameter to affect operating condition of memory | — | 2014-09-02 |
| 8759969 | Integrated circuit dice with edge finishing | — | 2014-06-24 |