TY

Theodros Yigzaw

IN Intel: 30 patents #1,238 of 30,777Top 5%
Overall (All Time): #114,621 of 4,157,543Top 3%
31
Patents All Time

Issued Patents All Time

Showing 25 most recent of 31 patents

Patent #TitleCo-InventorsDate
12360847 Adaptive internal error scrubbing and error handling Kuljit S. Bains, Kjersten E. Criss, Rajat Agarwal, Omar Avelar Suarez, Subhankar Panda +3 more 2025-07-15
12235720 Adaptive error correction to improve system memory reliability, availability, and serviceability (RAS) Rajat Agarwal, Hsing-Min Chen, Wei-Pin Chen, Wei Wu, Jing Ling +7 more 2025-02-25
12189468 Cloud scale server reliability management John G. Holm, Subhankar Panda, Hugo Enrique Gonzalez Chavero, Satyaprakash Nanda, Omar Avelar Suarez +1 more 2025-01-07
12189479 Apparatus and method for detecting and recovering from data fetch errors Geeyarpuram N. Santhanakrishnan, Ganapati Srinivasa, Jose A. Vargas, Hisham Shafi, Michael Mishaeli +5 more 2025-01-07
12044730 Device, system, and method to concurrently store multiple PMON counts in a single register Gaurav Porwal, Subhankar Panda, John G. Holm 2024-07-23
11307996 Hardware unit for reverse translation in a processor Sarathy Jayakumar, Ashok Raj, Wei-Pin Chen, John G. Holm 2022-04-19
11182313 System, apparatus and method for memory mirroring in a buffered memory architecture Ishwar Agarwal 2021-11-23
11068339 Read from memory instructions, processors, methods, and systems, that do not take exception on defective data Ashok Raj, Ron Gabor, Hisham Shafi, Sergiu D. Ghetie, Mohan J. Kumar +2 more 2021-07-20
11048587 Apparatus and method for detecting and recovering from data fetch errors Geeyarpuram N. Santhanakrishnan, Ganapati Srinivasa, Jose A. Vargas, Hisham Shafi, Michael Mishaeli +5 more 2021-06-29
10929232 Delayed error processing Subhankar Panda, Sarathy Jayakumar, Gaurav Porwal 2021-02-23
10324852 System and method to increase availability in a multi-level memory configuration Ashok Raj, Robert C. Swanson, Mohan J. Kumar 2019-06-18
10319458 Hardware apparatuses and methods to check data storage devices for transient faults Ashok Raj, Ron Gabor, Hisham Shafi, Mohan J. Kumar 2019-06-11
10318368 Enabling error status and reporting in a machine check architecture Ashok Raj 2019-06-11
10296416 Read from memory instructions, processors, methods, and systems, that do not take exception on defective data Ashok Raj, Ron Gabor, Hisham Shafi, Sergiu D. Ghetie, Mohan J. Kumar +2 more 2019-05-21
10223204 Apparatus and method for detecting and recovering from data fetch errors Geeyarpuram N. Santhanakrishnan, Ganapati Srinivasa, Jose A. Vargas, Hisham Shafi, Michael Mishaeli +5 more 2019-03-05
10185619 Handling of error prone cache line slots of memory side cache of multi-level system memory Ashok Raj, Robert C. Swanson, Mohan J. Kumar 2019-01-22
10162761 Apparatus and method for system physical address to memory module address translation Ashok Raj, Sreenivas Mandava, Sarathy Jayakumar, Mohan J. Kumar, Ronald N. Story 2018-12-25
10157005 Utilization of non-volatile random access memory for information storage in response to error conditions Robert C. Swanson, Tony S. Baker, Chris Ackles, Celeste M. Brown 2018-12-18
9904586 Interfacing with block-based storage in a processor Mohan J. Kumar, Hisham Shafi, Ron Gabor, Ashok Raj 2018-02-27
9842015 Instruction and logic for machine checking communication Ashok Raj, Mohan J. Kumar, Jose A. Vargas, William G. Auld, Cameron McNairy +2 more 2017-12-12
9817738 Clearing poison status on read accesses to volatile memory regions allocated in non-volatile memory Raj K. Ramanujan, Camille C. Raad, Richard P. Mangold 2017-11-14
9798641 Method to increase cloud availability and silicon isolation using secure enclaves Robert C. Swanson, Eswaramoorthi Nallusamy, Raghunandan Makaram, Vincent J. Zimmer 2017-10-24
9690640 Recovery from multiple data errors Raanan Sade, Ron Gabor, Deep Buch, Stanislav Shwartsman 2017-06-27
9595349 Hardware apparatuses and methods to check data storage devices for transient faults Ashok Raj, Ron Gabor, Hisham Shafi, Mohan J. Kumar 2017-03-14
9448879 Apparatus and method for implement a multi-level memory hierarchy Oded Lempel, Hisham Shafi, Geeyarpuram N. Santhanakrishnan, Jose A. Vargas, Ganapati Srinivasa +6 more 2016-09-20