JZ

John F. Zumkehr

IN Intel: 19 patents #2,136 of 30,777Top 7%
TL Trw Limited: 4 patents #293 of 2,166Top 15%
TB The Boeing: 4 patents #77 of 1,309Top 6%
KH Key Control Holding: 1 patents #9 of 14Top 65%
Overall (All Time): #175,370 of 4,157,543Top 5%
24
Patents All Time

Issued Patents All Time

Showing 1–24 of 24 patents

Patent #TitleCo-InventorsDate
7729168 Reduced signal level support for memory devices James E. Chandler, Jeffrey E. Smith 2010-06-01
7623032 Object controlled access and inventory system Roger A. Niederland, James E. Chandler 2009-11-24
7152008 Calibrated differential voltage crossing James E. Chandler, Renjeng Chiang 2006-12-19
7127584 System and method for dynamic rank specific timing adjustments for double data rate (DDR) components Derek A. Thompson, Darrell S. McGinnis 2006-10-24
7095245 Internal voltage reference for memory interface James E. Chandler, Ray Chiang 2006-08-22
7071728 Hybrid compensated buffer design James E. Chandler, Arnaud J. Forestier 2006-07-04
7046062 Method and device for symmetrical slew rate calibration James E. Chandler 2006-05-16
7036053 Two dimensional data eye centering for source synchronous data transfers John L. Bryan, Howard S. David, Klaus Ruff 2006-04-25
6965529 Memory bus termination James E. Chandler 2005-11-15
6956775 Write pointer error recovery Derek A. Thompson, Darrell S. McGinnis, Steve A. McKinnon 2005-10-18
6922077 Hybrid compensated buffer design James E. Chandler, Arnaud J. Forestier 2005-07-26
6918048 System and method for delaying a strobe signal based on a slave delay base and a master delay adjustment 2005-07-12
6901494 Memory control translators Pete D. Vogt 2005-05-31
6864731 Method and device for symmetrical slew rate calibration James E. Chandler 2005-03-08
6785842 Systems and methods for use in reduced instruction set computer processors for retrying execution of instructions resulting in errors Amir A. Abouelnaga 2004-08-31
6629225 Method and apparatus for control calibration of multiple memory modules within a memory channel 2003-09-30
6622227 Method and apparatus for utilizing write buffers in memory control/interface Pete D. Vogt 2003-09-16
6617895 Method and device for symmetrical slew rate calibration James E. Chandler 2003-09-09
6581017 System and method for minimizing delay variation in double data rate strobes 2003-06-17
6456544 Selective forwarding of a strobe based on a predetermined delay following a memory read command 2002-09-24
6316980 Calibrating data strobe signal using adjustable delays with feedback Pete D. Vogt 2001-11-13
6247118 Systems and methods for transient error recovery in reduced instruction set computer processors via instruction retry Amir A. Abouelnaga 2001-06-12
6173414 Systems and methods for reduced error detection latency using encoded data Amir A. Abouelnaga 2001-01-09
5974529 Systems and methods for control flow error detection in reduced instruction set computer processors Amir A. Abouelnaga 1999-10-26