Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12079149 | Presentation of direct accessed storage under a logical drive model | Thomas M. Slaight, Sivakumar Radhakrishnan, Mark A. Schmisseur, Pankaj Kumar, Saptarshi Mondal +9 more | 2024-09-03 |
| 11922220 | Function as a service (FaaS) system enhancements | Mohammad R. Haghighat, Kshitij A. Doshi, Andrew J. Herdrich, Anup Mohan, Ravishankar Iyer +25 more | 2024-03-05 |
| 11604746 | Presentation of direct accessed storage under a logical drive model | Thomas M. Slaight, Sivakumar Radhakrishnan, Mark A. Schmisseur, Pankaj Kumar, Saptarshi Mondal +9 more | 2023-03-14 |
| 10691839 | Method, apparatus, and system for manageability and secure routing and endpoint access | Mahesh S. Natu | 2020-06-23 |
| 10656873 | Technologies for prioritizing execution of storage commands | John W. Carroll, David E. Cohen, James R. Harris | 2020-05-19 |
| 10365832 | Two-level system main memory | Glenn J. Hinton, Raj K. Ramanujan | 2019-07-30 |
| 9971912 | Method, apparatus, and system for manageability and secure routing and endpoint access | Mahesh S. Natu | 2018-05-15 |
| 9690493 | Two-level system main memory | Glenn J. Hinton, Raj K. Ramanujan | 2017-06-27 |
| 9417821 | Presentation of direct accessed storage under a logical drive model | Thomas M. Slaight, Sivakumar Radhakrishnan, Mark A. Schmisseur, Pankaj Kumar, Saptarshi Mondal +9 more | 2016-08-16 |
| 9087584 | Two-level system main memory | Glenn J. Hinton, Raj K. Ramanujan | 2015-07-21 |
| 8930609 | Method, apparatus, and system for manageability and secure routing and endpoint access | Mahesh S. Natu | 2015-01-06 |
| 8850249 | Enabling idle states for a component associated with an interconnect | Jimbo Alexander, Parthipan Satchi | 2014-09-30 |
| 8612676 | Two-level system main memory | Glenn J. Hinton, Raj K. Ramanujan | 2013-12-17 |
| 7734942 | Enabling idle states for a component associated with an interconnect | Jimbo Alexander, Parthipan Satchi | 2010-06-08 |
| 7318130 | System and method for thermal throttling of memory modules | Warren R. Morrow, Raman Nayyar, Jayamohan Dharanipathi, Howard S. David | 2008-01-08 |
| 7194607 | Method and apparatus for command translation and enforcement of ordering of commands | Susan S. Meredith | 2007-03-20 |
| 7130229 | Interleaved mirrored memory systems | Warren R. Morrow, Peter Vogt | 2006-10-31 |
| 7076618 | Memory controllers with interleaved mirrored memory modes | Warren R. Morrow, Peter Vogt | 2006-07-11 |
| 7017017 | Memory controllers with interleaved mirrored memory modes | Warren R. Morrow, Peter Vogt | 2006-03-21 |
| 6832274 | Address translation | Hidetaka Oki | 2004-12-14 |
| 6769041 | Method and apparatus for providing bimodal voltage references for differential signaling | Leonard W. Cross | 2004-07-27 |
| 6601117 | Arrangements for independent queuing/tracking of transaction portions to reduce latency | Hidetaka Oki | 2003-07-29 |
| 6567883 | Method and apparatus for command translation and enforcement of ordering of commands | Susan S. Meredith | 2003-05-20 |
| 6449669 | Method and apparatus for providing bimodal voltage references for differential signaling | Leonard W. Cross | 2002-09-10 |