| 11841752 |
Controlling average power limits of a processor |
Tessil Thomas, Lokesh Sharma, Ian M. Steiner |
2023-12-12 |
| 11079819 |
Controlling average power limits of a processor |
Tessil Thomas, Lokesh Sharma, Ian M. Steiner |
2021-08-03 |
| 9336175 |
Utilization-aware low-overhead link-width modulation for power reduction in interconnects |
Ankush Varma, Robert G. Blankenship, Krishnakanth V. Sistla, Michael Cole |
2016-05-10 |
| 9053244 |
Utilization-aware low-overhead link-width modulation for power reduction in interconnects |
Ankush Varma, Robert G. Blankenship, Krishnakanth V. Sistla, Michael Cole |
2015-06-09 |
| 8935578 |
Method and apparatus for optimizing power and latency on a link |
James W. Alexander, Pinkesh Shah, Malay Trivedi, Mohan Nair |
2015-01-13 |
| 7353313 |
General input/output architecture, protocol and related methods to manage data integrity |
Eric R. Wehage, Jasmin Ajanovic, David J. Harriman, David M. Lee, Blaise Fanning +2 more |
2008-04-01 |
| 7257659 |
Method for signaling PCI/PCI-X standard hot-plug controller (SHPC) command status |
Peter Martin |
2007-08-14 |
| 7152128 |
General input/output architecture, protocol and related methods to manage data integrity |
Eric R. Wehage, Jasmin Ajanovic, David J. Harriman, David M. Lee, Blaise Fanning +2 more |
2006-12-19 |
| 5912832 |
Fast n-bit by n-bit multipliers using 4-bit by 4-bit multipliers and cascaded adders |
Michael F. Flahie |
1999-06-15 |