Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12367063 | Technology to measure latency in hardware with fine-grained transactional filtration | Pattabhiraman K, Ankita A. Agarwal | 2025-07-22 |
| 11210094 | Method and apparatus for minimally intrusive instruction pointer-aware processing resource activity profiling | Alexandr Kurylev, Subramaniam Maiyuran, Vikranth Vemulapalli, Sriharsha Vadlamani, Piotr Reiter | 2021-12-28 |
| 9336175 | Utilization-aware low-overhead link-width modulation for power reduction in interconnects | Ankush Varma, Buck Gremel, Robert G. Blankenship, Krishnakanth V. Sistla | 2016-05-10 |
| 9053244 | Utilization-aware low-overhead link-width modulation for power reduction in interconnects | Ankush Varma, Buck Gremel, Robert G. Blankenship, Krishnakanth V. Sistla | 2015-06-09 |
| 8079031 | Method, apparatus, and a system for dynamically configuring a prefetcher based on a thread specific latency metric | Geeyarpuram N. Santhanakrishnan, Mark Rowland, Ganapati Srinivasa | 2011-12-13 |
| 6125425 | Memory controller performing a mid transaction refresh and handling a suspend signal | David Puffer | 2000-09-26 |
| 5901298 | Method for utilizing a single multiplex address bus between DRAM, SRAM and ROM | T. Scott Cummins, David Puffer, Scott Goble, Bruce A. Young | 1999-05-04 |