Manoj Khare — 17 Patents at Intel

Manoj Khare has been granted 17 US patents while listed as an inventor at Intel. The first was granted in 1994 and the most recent in August 2011. Manoj Khare ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Manoj Khare in Fremont, CA, US.

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
7996625	Method and apparatus for reducing memory latency in a cache coherent multi-node architecture	Faye A. Briggs, Akhilesh Kumar, Lily P. Looi, Kai Cheng	2011-08-09	$24,223,000
7464254	Programmable processor apparatus integrating dedicated search registers and dedicated state machine registers with associated execution hardware to support rapid application of rulesets to data	Harshvardhan Sharangpani, Kent Fielden, Rajesh Patil, Judge Kennedy Singh Arora	2008-12-09	$61,737,000
7234029	Method and apparatus for reducing memory latency in a cache coherent multi-node architecture	Faye A. Briggs, Akhilesh Kumar, Lily P. Looi, Kai Cheng	2007-06-19	$30,093,000
7167957	Mechanism for handling explicit writeback in a cache coherent multi-node architecture	Lily P. Looi, Akhilesh Kumar	2007-01-23	$17,655,000
7124252	Method and apparatus for pipelining ordered input/output transactions to coherent memory in a distributed memory, cache coherent, multi-processor system	Akhilesh Kumar, Lily P. Looi, Kenneth C. Creta	2006-10-17	$12,433,000
7085918	Methods and apparatuses for evaluation of regular expressions of arbitrary size	Harshvardan Sharangpani, Kent Fielden, Rajesh Patil, Judge Kennedy Singh Arora	2006-08-01	$44,869,000
6976129	Mechanism for handling I/O transactions with known transaction length to coherent memory in a cache coherent multi-node architecture	Kenneth C. Creta, Lily P. Looi, Akhilesh Kumar	2005-12-13	$11,810,000
6971098	Method and apparatus for managing transaction requests in a multi-node architecture	Akhilesh Kumar, Ioannis T. Schoinas, Lily P. Looi	2005-11-29	$29,558,000
6859864	Mechanism for initiating an implicit write-back in response to a read or snoop of a modified cache line	Lily P. Looi, Akhilesh Kumar, Kenneth C. Creta	2005-02-22	$35,388,000
6842830	Mechanism for handling explicit writeback in a cache coherent multi-node architecture	Lily P. Looi, Akhilesh Kumar	2005-01-11	$22,975,000
6826619	Method and apparatus for preventing starvation in a multi-node architecture	Akhilesh Kumar, Sin S. Tan	2004-11-30	$36,984,000
6810467	Method and apparatus for centralized snoop filtering	Faye A. Briggs, Kai Cheng, Lily P. Looi	2004-10-26	$32,891,000
6772298	Method and apparatus for invalidating a cache line without data return in a multi-node architecture	Akhilesh Kumar, Ken Creta, Lily P. Looi, Robert T. George, Michel Cekleov	2004-08-03	$15,005,000
6622215	Mechanism for handling conflicts in a multi-node computer architecture	Akhilesh Kumar, Lily P. Looi, Sin S. Tan	2003-09-16	$36,866,000
6615319	Distributed mechanism for resolving cache coherence conflicts in a multi-node computer architecture	Lily P. Looi, Akhilesh Kumar, Faye A. Briggs	2003-09-02	$46,907,000
6487643	Method and apparatus for preventing starvation in a multi-node architecture	Akhilesh Kumar	2002-11-26	$59,548,000
5367657	Method and apparatus for efficient read prefetching of instruction code data in computer memory subsystems	Sudarshan B. Cadambi	1994-11-22	$19,549,000

Manoj Khare — 17 Patents

Issued Patents All Time

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