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Programmable processor apparatus integrating dedicated search registers and dedicated state machine registers with associated execution hardware to support rapid application of rulesets to data |
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Method and apparatus for reducing memory latency in a cache coherent multi-node architecture |
Faye A. Briggs, Akhilesh Kumar, Lily P. Looi, Kai Cheng |
2007-06-19 |
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Mechanism for handling explicit writeback in a cache coherent multi-node architecture |
Lily P. Looi, Akhilesh Kumar |
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Method and apparatus for pipelining ordered input/output transactions to coherent memory in a distributed memory, cache coherent, multi-processor system |
Akhilesh Kumar, Lily P. Looi, Kenneth C. Creta |
2006-10-17 |
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Methods and apparatuses for evaluation of regular expressions of arbitrary size |
Harshvardan Sharangpani, Kent Fielden, Rajesh Patil, Judge Kennedy Singh Arora |
2006-08-01 |
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Mechanism for handling I/O transactions with known transaction length to coherent memory in a cache coherent multi-node architecture |
Kenneth C. Creta, Lily P. Looi, Akhilesh Kumar |
2005-12-13 |
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Method and apparatus for managing transaction requests in a multi-node architecture |
Akhilesh Kumar, Ioannis T. Schoinas, Lily P. Looi |
2005-11-29 |
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Mechanism for initiating an implicit write-back in response to a read or snoop of a modified cache line |
Lily P. Looi, Akhilesh Kumar, Kenneth C. Creta |
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Mechanism for handling explicit writeback in a cache coherent multi-node architecture |
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Method and apparatus for preventing starvation in a multi-node architecture |
Akhilesh Kumar, Sin S. Tan |
2004-11-30 |
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Method and apparatus for centralized snoop filtering |
Faye A. Briggs, Kai Cheng, Lily P. Looi |
2004-10-26 |
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Method and apparatus for invalidating a cache line without data return in a multi-node architecture |
Akhilesh Kumar, Ken Creta, Lily P. Looi, Robert T. George, Michel Cekleov |
2004-08-03 |
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Akhilesh Kumar, Lily P. Looi, Sin S. Tan |
2003-09-16 |
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Distributed mechanism for resolving cache coherence conflicts in a multi-node computer architecture |
Lily P. Looi, Akhilesh Kumar, Faye A. Briggs |
2003-09-02 |
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Method and apparatus for preventing starvation in a multi-node architecture |
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Method and apparatus for efficient read prefetching of instruction code data in computer memory subsystems |
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