Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Suresh Srinivas — 16 Patents

Intel: 16 patents #2,596 of 30,777Top 9%
Portland, OR: #1,150 of 9,213 inventorsTop 15%
Oregon: #2,717 of 28,073 inventorsTop 10%
Overall (All Time): #284,196 of 4,157,543Top 7%
16 Patents All Time
Suresh Srinivas has been granted 16 US patents while listed as an inventor at Intel. The first was granted in 2008 and the most recent in July 2020. Suresh Srinivas ranks #284,196 of 4,157,543 US inventors in our database (top 6.8%). Patent records list Suresh Srinivas in Portland, OR, US.

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10725755 Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads David J. Sager, Ruchira Sasanka, Ron Gabor, Shlomo Raikin, Joseph Nuzman +10 more 2020-07-28 $26,273,000
10120663 Inter-architecture compatability module to allow code module of one architecture to use library module of another architecture Niranjan Hasabnis, Jayaram Bobba 2018-11-06 $18,970,000
9672019 Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads David J. Sager, Ruchira Sasanka, Ron Gabor, Shlomo Raikin, Joseph Nuzman +10 more 2017-06-06 $12,588,000
9542191 Hardware profiling mechanism to enable page level automatic binary translation Paul Caprioli, Matthew C. Merten, Muawya M. Al-Otoom, Omar M. Shaikh, Abhay S. Kanhere +3 more 2017-01-10 $11,357,000
9529645 Methods and apparatus to manage speculative execution of object locks by diverting the speculative execution of target code Stephen H. Dohrmann, Mingqiu Sun, Uma Srinivasan, Ravi Rajwar, Konrad K. Lai 2016-12-27 $11,980,000
9417855 Instruction and logic to perform dynamic binary translation Abhay S. Kanhere, Paul Caprioli, Koichi Yamada, Suriya Madras-Subramanian 2016-08-16 $10,311,000
9189233 Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads Ruchira Sasanka, Abhinav Das, Jeffrey J. Cook, Jayaram Bobba, Arvind Krishnaswamy +1 more 2015-11-17 $15,457,000
9170789 Analyzing potential benefits of vectorization Ruchira Sasanka, Jeffrey J. Cook, Abhinav Das, Jayaram Bobba, Michael R. Greenfield 2015-10-27 $18,168,000
8972994 Method and apparatus to bypass object lock by speculative execution of generated bypass code shell based on bypass failure threshold in managed runtime environment Stephen H. Dohrmann, Mingqiu Sun, Uma Srinivasan, Ravi Rajwar, Konrad K. Lai 2015-03-03 $18,773,000
8812792 Technique for using memory attributes Quinn A. Jacobson, Anne W. Bracy, Hong Wang, John Shen, Per Hammarlund +6 more 2014-08-19 $23,268,000
8775153 Transitioning from source instruction set architecture (ISA) code to translated code in a partial emulation environment Sebastian Winkel, Koichi Yamada, James E. Smith 2014-07-08 $15,420,000
8762127 Transitioning from source instruction set architecture (ISA) code to translated code in a partial emulation environment Sebastian Winkel, Koichi Yamada, James E. Smith 2014-06-24 $15,136,000
8560781 Technique for using memory attributes Quinn A. Jacobson, Anne W. Bracy, Hong Wang, John Shen, Per Hammarlund +6 more 2013-10-15 $19,695,000
7991956 Providing application-level information for use in cache management Rameshkumar G. Illikkal, Ravishankar Iyer, Li Zhao, Donald Newell, Carl Lebsack +2 more 2011-08-02 $15,238,000
7991965 Technique for using memory attributes Quinn A. Jacobson, Anne W. Bracy, Hong Wang, John Shen, Per Hammarlund +6 more 2011-08-02 $15,238,000
7415701 Methods and apparatus to support mixed-mode execution within a single instruction set architecture process of a virtual machine Yun Wang, Miaobo Chen, Eric Lin, Chris Elford 2008-08-19 $22,118,000