Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Mani Ayyar — 17 Patents

Intel: 16 patents #2,596 of 30,777Top 9%
Cupertino, CA: #987 of 6,989 inventorsTop 15%
California: #35,467 of 386,348 inventorsTop 10%
Overall (All Time): #263,971 of 4,157,543Top 7%
17 Patents All Time
Mani Ayyar has been granted 17 US patents while listed as an inventor at Intel. The first was granted in 2003 and the most recent in October 2017. Mani Ayyar ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Mani Ayyar in Cupertino, CA, US.

Patents per Year

Patents granted per year, 2003 to 2017Bar chart with a peak of 4 patents in 2003.peak 42003: 4 patents20032004: 2 patents2006: 1 patents20062008: 1 patents2009: 1 patents20092010: 2 patents2011: 1 patents20112012: 2 patents2013: 1 patents20132015: 1 patents2017: 1 patents2017

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9798556 Method, system, and apparatus for dynamic reconfiguration of resources Eric Delano, Ioannis Schoinas, Akhilesh Kumar, Doddaballapur N. Jayasimha, Jose A. Vargas 2017-10-24 $10,797,000
9223738 Method, system, and apparatus for dynamic reconfiguration of resources Eric Delano, Ioannis Schoinas, Akhilesh Kumar, Doddaballapur N. Jayasimha, Jose A. Vargas 2015-12-29 $8,962,000
8606934 Method, system, and apparatus for system level initialization by conveying capabilities and identifiers of components Srinivas Chennupaty, Akhilesh Kumar, Doddabaliapur Narasimha-Murthy Jayasimha, Murugasamy Nachimuthu, Phanindra Kumar Mannava +1 more 2013-12-10 $14,665,000
8327113 Method, system, and apparatus for dynamic reconfiguration of resources Eric Delano, Ioannis T. Schoinas, Akhilesh Kumar, Jay Jayasimha, Jose A. Vargas 2012-12-04 $14,359,000
8171121 Method, system, and apparatus for dynamic reconfiguration of resources Eric Delano, Ioannis T. Schoinas, Akhilesh Kumar, Jay Jayasimha, Jose A. Vargas 2012-05-01 $20,956,000
7904751 System abstraction layer, processor abstraction layer, and operating system error handling Suresh Marisetty, Nhon Quach, Bernard Lint 2011-03-08 $15,954,000
7738484 Method, system, and apparatus for system level initialization Srinivas Chennupaty, Akhilesh Kumar, Doddaballapur N. Jayasimha, Murugasamy Nachimuthu, Phanindra Kumar Mannava 2010-06-15 $15,580,000
7734741 Method, system, and apparatus for dynamic reconfiguration of resources Eric Delano, Ioannis T. Schoinas, Akhilesh Kumar, Jay Jayasimha, Jose A. Vargas 2010-06-08 $11,764,000
7502959 Error correction apparatus, systems, and methods Suresh Marisetty, George Thangadurai 2009-03-10 $16,837,000
7433985 Conditional and vectored system management interrupts Ioannis T. Schoinas, Rama Menon, Aniruddha Vaidya, Akhilesh Kumar 2008-10-07 $21,141,000
7117396 Scalable CPU error recorder Eshwari P. Komarla, Suresh Marisetty, Andrew J. Fish, Mohan J. Kumar, Shivnandan Kaushik 2006-10-03 $14,661,000
6754828 Algorithm for non-volatile memory updates Suresh Marisetty, Andrew J. Fish, Yan Li, Amy O'Donnell, George Thangadurai +1 more 2004-06-22 $27,859,000
6675324 Rendezvous of processors with OS coordination Suresh Marisetty, George Thangadurai 2004-01-06 $43,851,000
6622260 System abstraction layer, processor abstraction layer, and operating system error handling Suresh Marisetty, Nhon Quach, Bernard Lint 2003-09-16
6601166 Mechanism for booting a computer through a network Sham M. Datta, Andrew J. Fish 2003-07-29 $49,479,000
6594756 Multi-processor system for selecting a processor which has successfully written it's ID into write-once register after system reset as the boot-strap processor Sham M. Datta, Douglas R. Moran, Stephen S. Pawlowski 2003-07-15 $37,859,000
6584573 Placing a computer system into a sleeping state Russ Wunderlich, Yan Li, Gary N. Hammond 2003-06-24 $97,005,000