Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
JF

John Fu — 16 Patents

Intel: 13 patents #3,167 of 30,777Top 15%
WEWestinghouse Electric: 1 patents #2,483 of 5,139Top 50%
Microsoft: 1 patents #24,968 of 40,388Top 65%
Monroeville, PA: #39 of 710 inventorsTop 6%
Pennsylvania: #4,567 of 74,527 inventorsTop 7%
Overall (All Time): #284,196 of 4,157,543Top 7%
16 Patents All Time
John Fu has been granted 16 US patents while listed as an inventor at Intel. The first was granted in 1984 and the most recent in May 2008. John Fu ranks #284,196 of 4,157,543 US inventors in our database (top 6.8%). Patent records list John Fu in Monroeville, PA, US.

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
7376877 Combined tag and data ECC for enhanced soft error recovery from cache tag errors Nhon Quach, Sunny C. Huang, Jeen-Yuan Miin, Dean Mulla 2008-05-20 $25,766,000
7089460 System and method for memory leak detection 2006-08-08 $31,016,000
6948094 Method of correcting a machine check error Len Schultz, Nhon Quach, Dean Mulla, Jim Hays 2005-09-20 $19,561,000
6772383 Combined tag and data ECC for enhanced soft error recovery from cache tag errors Nhon Quach, Sunny C. Huang, Jeen-Yuan Miin, Dean Mulla 2004-08-03 $15,005,000
6725339 Processing ordered data requests to a memory Dean Mulla, Gregory S. Mathews, Stuart E. Sailer, Jeng-Jye Shaw 2004-04-20 $26,995,000
6542966 Method and apparatus for managing temporal and non-temporal data in a single cache structure John H. Crawford, Gautam Doshi, Stuart E. Sailer, Gregory S. Mathews 2003-04-01 $56,060,000
6453427 Method and apparatus for handling data errors in a computer system Nhon Quach, James O. Hays, Valentin Anders, Sorin Iacobovici, Alberto J. Munoz +1 more 2002-09-17 $55,841,000
6427191 High performance fully dual-ported, pipelined cache design Dean Mulla, Gregory S. Mathews 2002-07-30 $108,056,000
6381678 Processing ordered data requests to a memory Dean Mulla, Gregory S. Mathews, Stuart E. Sailer, Jeng-Jye Shaw 2002-04-30 $84,693,000
6292906 Method and apparatus for detecting and compensating for certain snoop errors in a system with multiple agents having cache memories Muthurajan Jayakumar 2001-09-18 $133,519,000
6272597 Dual-ported, pipelined, two level cache system Dean Mulla, Gregory S. Mathews, Stuart E. Sailer 2001-08-07 $139,051,000
6226763 Method and apparatus for performing cache accesses Dean Mulla 2001-05-01 $311,645,000
6134636 Method and apparatus for storing data in a memory array Gregory S. Mathews, Dean Mulla 2000-10-17 $234,968,000
D430220 Sign for automobile window 2000-08-29
6067656 Method and apparatus for detecting soft errors in content addressable memory arrays Stefan Rusu, Simon Tam 2000-05-23 $253,380,000
4488939 Vapor corrosion rate monitoring method and apparatus 1984-12-18 $2,461,000