Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7612780 | Optimized memory addressing | Aditya Sreenivas, Zohar Bogin, Anoop Mukker, Tuong Trieu | 2009-11-03 |
| 7269754 | Method and apparatus for flexible and programmable clock crossing control with dynamic compensation | Sridhar Ramaswamy, Amit S. Bodas, Zohar Bogin, Suryaprasad Kareenahalli | 2007-09-11 |
| 7230627 | Optimized memory addressing | Aditya Sreenivas, Zohar Bogin, Anoop Mukker, Tuong Trieu | 2007-06-12 |
| 7047384 | Method and apparatus for dynamic timing of memory interface signals | Amit S. Bodas, Zohar Bogin, Suryaprasad Kareenahalli, Sridhar Ramaswamy | 2006-05-16 |
| 6564335 | Cross chip transfer mechanism for a memory repeater chip in a Dram memory system | — | 2003-05-13 |
| 6442645 | Pre-decode conditional command generation for reduced SDRAM cycle latency | — | 2002-08-27 |
| 6408398 | Method and apparatus for detecting time domains on a communication channel | Andrew M. Volk | 2002-06-18 |
| 6181619 | Selective automatic precharge of dynamic random access memory banks | Zohar Bogin, Vincent E. VonBokern | 2001-01-30 |
| 6141283 | Method and apparatus for dynamically placing portions of a memory in a reduced power consumption state | Zohar Bogin | 2000-10-31 |
| 6041016 | Optimizing page size in mixed memory array using address multiplexing | — | 2000-03-21 |
| 5987628 | Method and apparatus for automatically correcting errors detected in a memory subsystem | Vincent Edward Von Bokern, Zohar Bogin | 1999-11-16 |
| 5835435 | Method and apparatus for dynamically placing portions of a memory in a reduced power consumtion state | Zohar Bogin | 1998-11-10 |
| 5678009 | Method and apparatus providing fast access to a shared resource on a computer bus | Kuljit S. Bains, Kenneth M. Crocker | 1997-10-14 |