| 10297001 |
Reduced power implementation of computer instructions |
Subramaniam Maiyuran, Shubh Shah, Ashutosh Garg, Jin Xu, Thomas A. Piazza +1 more |
2019-05-21 |
| 9996386 |
Mid-thread pre-emption with software assisted context switch |
Brian D. Rauchfuss, Naveen Matam, Aditya Navale |
2018-06-12 |
| 8902915 |
Dataport and methods thereof |
Dinakar C. Munagala, Hong Jiang, Bishara Shomar, Val G. Cook, Thomas A. Piazza |
2014-12-02 |
| 8279886 |
Dataport and methods thereof |
Dinakar C. Munagala, Hong Jiang, Bishara Shomar, Val G. Cook, Thomas A. Piazza |
2012-10-02 |
| 8171225 |
Cache for a multi thread and multi core system and methods thereof |
Thomas A. Piazza, Scott W. Cheng |
2012-05-01 |
| 7861249 |
Thread to thread communication |
Hong Jiang |
2010-12-28 |
| 7765386 |
Scalable parallel pipeline floating-point unit for vector processing |
David Donofrio |
2010-07-27 |
| 7594236 |
Thread to thread communication |
Hong Jiang |
2009-09-22 |
| 7532765 |
Run length encoded digital image |
Thomas A. Piazza |
2009-05-12 |
| 7526124 |
Match MSB digital image compression |
Thomas A. Piazza |
2009-04-28 |
| 7434028 |
Hardware stack having entries with a data portion and associated counter |
Hong Jiang, Thomas A. Piazza |
2008-10-07 |
| 7219213 |
Flag bits evaluation for multiple vector SIMD channels execution |
Hong Jiang |
2007-05-15 |
| 7212676 |
Match MSB digital image compression |
Thomas A. Piazza |
2007-05-01 |
| 6369813 |
Processing polygon meshes using mesh pool window |
Vladimir Pentkovski, Deep Buch, Hsien-Hsin Sean Lee, Hsien-Cheng E. Hsieh |
2002-04-09 |