AG

Ashutosh Garg

Google: 65 patents #100 of 22,993Top 1%
IN Intel: 30 patents #1,238 of 30,777Top 5%
BL Bloomreach: 24 patents #1 of 61Top 2%
EA Eightfold Ai: 4 patents #1 of 6Top 20%
Microsoft: 3 patents #13,382 of 40,388Top 35%
IBM: 2 patents #32,839 of 70,183Top 50%
HP HP: 1 patents #8,774 of 16,619Top 55%
Overall (All Time): #7,818 of 4,157,543Top 1%
134
Patents All Time

Issued Patents All Time

Showing 25 most recent of 134 patents

Patent #TitleCo-InventorsDate
12430128 Sharing register file usage between fused processing resources Subramaniam Maiyuran, Varghese George, Joydeep Ray, Jorge Parra, Shubh Shah +1 more 2025-09-30
12405787 Utilizing structured sparsity in systolic arrays Subramaniam Maiyuran, Jorge Parra, Chandra Gurram, Chunhui Mei, Durgesh Borkar +10 more 2025-09-02
12293431 Sparse optimizations for a matrix accelerator architecture Joydeep Ray, Scott Janus, Varghese George, Subramaniam Maiyuran, Altug Koker +12 more 2025-05-06
12198222 Architecture for block sparse operations on a systolic array Abhishek R. Appu, Subramaniam Maiyuran, Mike B. Macpherson, Fangwen Fu, Jiasheng Chen +3 more 2025-01-14
12141757 System, method, and computer program for automatically predicting the job candidates most likely to be hired and successful in a job Varun Kacholia 2024-11-12
12045779 System, method, and computer program for automatically removing data from candidate profiles that may influence bias Varun Kacholia 2024-07-23
12039001 Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputs Subramaniam Maiyuran, Jorge Parra, Supratim Pal, Shubra Marwaha, Chandra Gurram +3 more 2024-07-16
12008067 Sparse matrix multiplication acceleration mechanism Subramaniam Maiyuran, Mathew Nevin, Jorge Parra, Shubra Marwaha, Shubh Shah 2024-06-11
12007935 Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format Subramaniam Maiyuran, Shubra Marwaha, Supratim Pal, Jorge Parra, Chandra Gurram +3 more 2024-06-11
11977885 Utilizing structured sparsity in systolic arrays Subramaniam Maiyuran, Jorge Parra, Chandra Gurram, Chunhui Mei, Durgesh Borkar +10 more 2024-05-07
11954063 Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format Subramaniam Maiyuran, Shubra Marwaha, Supratim Pal, Jorge Parra, Chandra Gurram +3 more 2024-04-09
11900502 Compiler assisted register file write reduction Chandra Gurram, Gang Chen, Subramaniam Maiyuran, Supratim Pal, Jorge Parra +3 more 2024-02-13
11842423 Dot product operations on sparse matrix elements Abhishek R. Appu, Subramaniam Maiyuran, Mike B. Macpherson, Fangwen Fu, Jiasheng Chen +3 more 2023-12-12
11727201 Annotation framework for video Mayur Datar, Vibhu Mittal 2023-08-15
11709793 Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format Subramaniam Maiyuran, Shubra Marwaha, Supratim Pal, Jorge Parra, Chandra Gurram +3 more 2023-07-25
11676239 Sparse optimizations for a matrix accelerator architecture Joydeep Ray, Scott Janus, Varghese George, Subramaniam Maiyuran, Altug Koker +12 more 2023-06-13
11669329 Instructions and logic for vector multiply add with zero skipping Supratim Pal, Sasikanth Avancha, Ishwar Bhati, Wei-Yu Chen, Dipankar Das +7 more 2023-06-06
11640297 Instruction and logic for systolic dot product with accumulate Subramaniam Maiyuran, Guei-Yuan Lueh, Supratim Pal, Chandra Gurram, Jorge Parra +10 more 2023-05-02
11636174 Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputs Subramaniam Maiyuran, Jorge Parra, Supratim Pal, Shubra Marwaha, Chandra Gurram +3 more 2023-04-25
11423213 Annotation framework for video Mayur Datar, Vibhu Mittal 2022-08-23
11416580 Dot product multiplier mechanism Nevin Mathew, Shubra Marwaha 2022-08-16
11361496 Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format Subramaniam Maiyuran, Shubra Marwaha, Supratim Pal, Jorge Parra, Chandra Gurram +3 more 2022-06-14
11321799 Compiler assisted register file write reduction Chandra Gurram, Gang Chen, Subramaniam Maiyuran, Supratim Pal, Jorge Parra +3 more 2022-05-03
11314515 Instructions and logic for vector multiply add with zero skipping Supratim Pal, Sasikanth Avancha, Ishwar Bhati, Wei-Yu Chen, Dipankar Das +7 more 2022-04-26
11221848 Sharing register file usage between fused processing resources Subramaniam Maiyuran, Varghese George, Joydeep Ray, Jorge Parra, Shubh Shah +1 more 2022-01-11