Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430128 | Sharing register file usage between fused processing resources | Subramaniam Maiyuran, Varghese George, Joydeep Ray, Ashutosh Garg, Jorge Parra +1 more | 2025-09-30 |
| 12405787 | Utilizing structured sparsity in systolic arrays | Subramaniam Maiyuran, Jorge Parra, Ashutosh Garg, Chandra Gurram, Chunhui Mei +10 more | 2025-09-02 |
| 12039001 | Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputs | Subramaniam Maiyuran, Jorge Parra, Supratim Pal, Ashutosh Garg, Chandra Gurram +3 more | 2024-07-16 |
| 12007935 | Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format | Subramaniam Maiyuran, Ashutosh Garg, Supratim Pal, Jorge Parra, Chandra Gurram +3 more | 2024-06-11 |
| 12008067 | Sparse matrix multiplication acceleration mechanism | Subramaniam Maiyuran, Mathew Nevin, Jorge Parra, Ashutosh Garg, Shubh Shah | 2024-06-11 |
| 11977885 | Utilizing structured sparsity in systolic arrays | Subramaniam Maiyuran, Jorge Parra, Ashutosh Garg, Chandra Gurram, Chunhui Mei +10 more | 2024-05-07 |
| 11954063 | Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format | Subramaniam Maiyuran, Ashutosh Garg, Supratim Pal, Jorge Parra, Chandra Gurram +3 more | 2024-04-09 |
| 11709793 | Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format | Subramaniam Maiyuran, Ashutosh Garg, Supratim Pal, Jorge Parra, Chandra Gurram +3 more | 2023-07-25 |
| 11640297 | Instruction and logic for systolic dot product with accumulate | Subramaniam Maiyuran, Guei-Yuan Lueh, Supratim Pal, Ashutosh Garg, Chandra Gurram +10 more | 2023-05-02 |
| 11636174 | Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputs | Subramaniam Maiyuran, Jorge Parra, Supratim Pal, Ashutosh Garg, Chandra Gurram +3 more | 2023-04-25 |
| 11416580 | Dot product multiplier mechanism | Nevin Mathew, Ashutosh Garg | 2022-08-16 |
| 11361496 | Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format | Subramaniam Maiyuran, Ashutosh Garg, Supratim Pal, Jorge Parra, Chandra Gurram +3 more | 2022-06-14 |
| 11221848 | Sharing register file usage between fused processing resources | Subramaniam Maiyuran, Varghese George, Joydeep Ray, Ashutosh Garg, Jorge Parra +1 more | 2022-01-11 |
| 11204977 | Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputs | Subramaniam Maiyuran, Jorge Parra, Supratim Pal, Ashutosh Garg, Chandra Gurram +3 more | 2021-12-21 |
| 11188618 | Sparse matrix multiplication acceleration mechanism | Subramaniam Maiyuran, Mathew Nevin, Jorge Parra, Ashutosh Garg, Shubh Shah | 2021-11-30 |
| 11042370 | Instruction and logic for systolic dot product with accumulate | Subramaniam Maiyuran, Guei-Yuan Lueh, Supratim Pal, Ashutosh Garg, Chandra Gurram +10 more | 2021-06-22 |