JW

Jeffrey R. Wilcox

IN Intel: 38 patents #927 of 30,777Top 4%
Apple: 13 patents #2,501 of 18,612Top 15%
Overall (All Time): #52,469 of 4,157,543Top 2%
51
Patents All Time

Issued Patents All Time

Showing 25 most recent of 51 patents

Patent #TitleCo-InventorsDate
11714924 Unified addressable memory Manu Gulati, Joseph Sokol, Jr., Bernard J. Semeria, Michael J. Smith 2023-08-01
11636801 Computer console for throttling the video bitrate of video streams to interface with an electronic device Reese A. Schreiber, Carlos Calderon, Collin L. Pieper, Ian Shaeffer, Robert L. Ridenour 2023-04-25
11263326 Method and apparatus for secure system boot Joshua P. de Cesare, Timothy R. Paaske, Xeno S. Kovah, Nikolaj Schlej, Ezekiel T. Runyon +3 more 2022-03-01
11221762 Common platform for one-level memory architecture and two-level memory architecture Joydeep Ray, Varghese George, Inder M. Sodhi 2022-01-11
11216054 Techniques for adjusting computing device sleep states using onboard sensors and learned user behaviors Joshua P. de Cesare, Jonathan J. Andrews 2022-01-04
11176280 Secure circuit control to disable circuitry Pierre-Olivier J. Martel, Ian Shaeffer, Andrew D. Myrick, Robert W. Hill, Tristan F. Schaap 2021-11-16
11138346 Unified addressable memory Manu Gulati, Joseph Sokol, Jr., Bernard J. Semeria, Michael J. Smith 2021-10-05
10929222 Storing address of spare in failed memory location Manu Gulati, Sukalpa Biswas, Farid Nemati 2021-02-23
10747908 Secure circuit control to disable circuitry Pierre-Olivier J. Martel, Ian Shaeffer, Andrew D. Myrick, Robert W. Hill, Tristan F. Schaap 2020-08-18
10712809 Link power savings with state retention Naveen Cherukuri, Venkatraman Iyer, Selim Bilgin, David S. Dunning, Robin Tim Frodsham +2 more 2020-07-14
10671762 Unified addressable memory Manu Gulati, Joseph Sokol, Jr., Bernard J. Semeria, Michael J. Smith 2020-06-02
10423212 Techniques for adjusting computing device sleep states using onboard sensors and learned user behaviors Joshua P. de Cesare, Jonathan J. Andrews 2019-09-24
10417429 Method and apparatus for boot variable protection Joshua P. de Cesare, Timothy R. Paaske, Xeno S. Kovah, Nikolaj Schlej, Hardik K. Doshi +2 more 2019-09-17
10318377 Storing address of spare in failed memory location Manu Gulati, Sukalpa Biswas, Farid Nemati 2019-06-11
10228861 Common platform for one-level memory architecture and two-level memory architecture Joydeep Ray, Varghese George, Inder M. Sodhi 2019-03-12
10175744 Link power savings with state retention Naveen Cherukuri, Venkatraman Iyer, Selim Bilgin, David S. Dunning, Robin Tim Frodsham +2 more 2019-01-08
10102157 Method and apparatus for reducing power consumption in a memory bus interface by selectively disabling and enabling sense amplifiers Noam Yosef 2018-10-16
10042701 Storing address of spare in failed memory location Manu Gulati, Sukalpa Biswas, Farid Nemati 2018-08-07
9910771 Non-volatile memory interface Eng Hun Ooi, Robert J. Royer, Jr., Michael W. Williams, Ritesh B. Trivedi, Blaise Fanning 2018-03-06
9794349 Dynamically modulating link width Naveen Cherukuri, Aaron T. Spink, Phanindra Kumar Mannava, Tim Frodsham, Sanjay Dabral +2 more 2017-10-17
9600413 Common platform for one-level memory architecture and two-level memory architecture Joydeep Ray, Varghese George, Inder M. Sodhi 2017-03-21
9588575 Link power savings with state retention Naveen Cherukuri, Venkatraman Iyer, Selim Bilgin, David S. Dunning, Robin Tim Frodsham +2 more 2017-03-07
9541983 Controlling reduced power states using platform latency tolerance Barnes Cooper, Michael N. Derr, Neil W. Songer, Craig S Forbell 2017-01-10
9535829 Non-volatile memory interface Eng Hun Ooi, Robert J. Royer, Jr., Michael W. Williams, Ritesh B. Trivedi, Blaise Fanning 2017-01-03
9195292 Controlling reduced power states using platform latency tolerance Barnes Cooper, Michael N. Derr, Neil W. Songer, Craig S Forbell 2015-11-24