Issued Patents All Time
Showing 25 most recent of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12197357 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more | 2025-01-14 |
| 12189550 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more | 2025-01-07 |
| 11741030 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more | 2023-08-29 |
| 11269793 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more | 2022-03-08 |
| 10268583 | High performance interconnect coherence protocol resolving conflict based on home transaction identifier different from requester transaction identifier | Robert Beers, Robert G. Blankenship, Robert J. Safranek, Jeff Willey, Robert A. Maddox | 2019-04-23 |
| 10248591 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more | 2019-04-02 |
| 9794349 | Dynamically modulating link width | Naveen Cherukuri, Phanindra Kumar Mannava, Tim Frodsham, Jeffrey R. Wilcox, Sanjay Dabral +2 more | 2017-10-17 |
| 9626321 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more | 2017-04-18 |
| 8914541 | Dynamically modulating link width | Naveen Cherukuri, Phanindra Mannaya, Tim Frodsham, Jeffrey R. Wilcox, Sanjay Dabral +2 more | 2014-12-16 |
| 8885673 | Interleaving data packets in a packet-based communication system | Herbert Hum | 2014-11-11 |
| 8412855 | Write combining protocol between processors and chipsets | Kenneth C. Creta, Lance Hacking, Sridhar Muthrasanallur, Jasmin Ajanovic | 2013-04-02 |
| 8325768 | Interleaving data packets in a packet-based communication system | Herbert Hum | 2012-12-04 |
| 8046488 | Dynamically modulating link width | Naveen Cherukuri, Phanindra Kumar Mannava, Tim Frodsham, Jeffrey R. Wilcox, Sanjay Dabral +2 more | 2011-10-25 |
| 7965741 | Method, apparatus, and system for idle state definition for power management | Tim Frodsham, Naveen Cherukuri, Sanjay Darbal, David S. Dunning, Theodore Z. Schoenborn +1 more | 2011-06-21 |
| 7957428 | Methods and apparatuses to effect a variable-width link | Maurice B. Steinman, Rahul R. Shah, Naveen Cherukuri, Allen J. Baum, Sanjay Dabral +3 more | 2011-06-07 |
| 7953902 | Negotiable exchange of link layer functional parameters in electronic systems having components interconnected by a point-to-point network | Phanindra Kumar Mannava, Victor W. Lee | 2011-05-31 |
| 7937505 | Method and system for flexible and negotiable exchange of link layer functional parameters | Phanindra Kumar Mannava, Victor W. Lee | 2011-05-03 |
| 7924708 | Method and apparatus for flow control initialization | — | 2011-04-12 |
| 7921251 | Globally unique transaction identifiers | Herbert Hum, Robert G. Blankenship | 2011-04-05 |
| 7783959 | Apparatus and method for reduced power consumption communications over a physical interconnect | Robert J. Safranek, Selim Bilgin | 2010-08-24 |
| 7752397 | Repeated conflict acknowledgements in a cache coherency protocol | Robert Beers | 2010-07-06 |
| 7716409 | Globally unique transaction identifiers | Herbert Hum, Robert G. Blankenship | 2010-05-11 |
| 7676603 | Write combining protocol between processors and chipsets | Kenneth C. Creta, Lance Hacking, Sridhar Muthrasanallur, Jasmin Ajanovic | 2010-03-09 |
| 7643477 | Buffering data packets according to multiple flow control schemes | Herbert Hum | 2010-01-05 |
| 7610500 | Link power saving state | Naveen Cherukuri, Jeffrey R. Wilcox, Sanjay Dabral, Phanindra Kumar Mannava, David S. Dunning +2 more | 2009-10-27 |