Issued Patents All Time
Showing 25 most recent of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12375408 | Dynamic load balancing for multi-core computing environments | Stephen T. Palermo, Bradley Chaddick, Gage Eads, Mrittika Ganguli, Abhishek Khade +6 more | 2025-07-29 |
| 12309067 | Hardware queue scheduling for multi-core computing environments | Niall D. McDonnell, Gage Eads, Mrittika Ganguli, Chetan Hiremath, John Mangan +11 more | 2025-05-20 |
| 12293231 | Packet processing load balancer | Chenmin Sun, Yipeng Wang, Ren Wang, Sameh Gobriel, Hongjun NI +2 more | 2025-05-06 |
| 12289239 | Dynamic load balancing for multi-core computing environments | Stephen T. Palermo, Bradley Chaddick, Gage Eads, Mrittika Ganguli, Abhishek Khade +6 more | 2025-04-29 |
| 12197357 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more | 2025-01-14 |
| 12189550 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more | 2025-01-07 |
| 12066939 | Cache line demote infrastructure for multi-processor pipelines | Omkar MASLEKAR, Priya Autee, Edwin Verplanke, Andrew J. Herdrich, Jeffrey D. Chamberlain | 2024-08-20 |
| 11741030 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more | 2023-08-29 |
| 11575607 | Dynamic load balancing for multi-core computing environments | Stephen T. Palermo, Bradley Chaddick, Gage Eads, Mrittika Ganguli, Abhishek Khade +6 more | 2023-02-07 |
| 11354264 | Bimodal PHY for low latency in high speed interconnects | Venkatraman Iyer, William R. Halleck, Eric M. Lee | 2022-06-07 |
| 11269793 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more | 2022-03-08 |
| 10963415 | Bimodal PHY for low latency in high speed interconnects | Venkatraman Iyer, William R. Halleck, Eric M. Lee | 2021-03-30 |
| 10931329 | High speed interconnect with channel extension | William R. Halleck, Fulvio Spagna, Venkatraman Iyer | 2021-02-23 |
| 10599602 | Bimodal phy for low latency in high speed interconnects | Venkatraman Iyer, William R. Halleck, Eric M. Lee | 2020-03-24 |
| 10372657 | Bimodal PHY for low latency in high speed interconnects | Venkatraman Iyer, William R. Halleck, Eric M. Lee | 2019-08-06 |
| 10324882 | High performance interconnect link state transitions | William R. Halleck, Venkatraman Iyer | 2019-06-18 |
| 10248591 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more | 2019-04-02 |
| 10152446 | Link-physical layer interface adapter | Venkatraman Iyer, Mahesh Wagh, William R. Halleck | 2018-12-11 |
| 10025746 | High performance interconnect | William R. Halleck, Venkatraman Iyer | 2018-07-17 |
| 9910809 | High performance interconnect link state transitions | William R. Halleck, Venkatraman Iyer | 2018-03-06 |
| 9779053 | Physical interface for a serial interconnect | Debendra Das Sharma, Daniel S. Froelich, Venkatraman Iyer, Michelle C. Jen, Eric M. Lee | 2017-10-03 |
| 9626321 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more | 2017-04-18 |
| 9160320 | Apparatus, system, and method for voltage swing and duty cycle adjustment | Eduard Roytman, Jian Xu, Kambiz R. Munshi, Ronald L. Bedard, Mahalingam Nagarajan | 2015-10-13 |
| 8542046 | Apparatus, system, and method for voltage swing and duty cycle adjustment | Eduard Roytman, Jian Xu, Kambiz R. Munshi, Ronald L. Bedard, Mahalingam Nagarajan | 2013-09-24 |
| 7957428 | Methods and apparatuses to effect a variable-width link | Maurice B. Steinman, Naveen Cherukuri, Aaron T. Spink, Allen J. Baum, Sanjay Dabral +3 more | 2011-06-07 |