Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12405904 | Sharing memory and I/O services between nodes | Debendra Das Sharma, Robert G. Blankenship, Suresh Chittor, Kenneth C. Creta, Balint Fleischer +2 more | 2025-09-02 |
| 12399832 | Shared buffered memory routing | Debendra Das Sharma, Brian S. Morris | 2025-08-26 |
| 12373279 | Selection of processing mode for receiver circuit | Swadesh Choudhary, Debendra Das Sharma | 2025-07-29 |
| 12332752 | Hardware logging for lane margining and characterization | Debendra Das Sharma, Swadesh Choudhary, Raghucharan Boddupalli | 2025-06-17 |
| 11789892 | Recalibration of PHY circuitry for the PCI express (PIPE) interface based on using a message bus interface | Minxi Gao, Debendra Das Sharma, Fulvio Spagna, Bruce A. Tennant, Noam Dolev Geldbard | 2023-10-17 |
| 11755486 | Shared buffered memory routing | Debendra Das Sharma, Brian S. Morris | 2023-09-12 |
| 11729096 | Techniques to support multiple protocols between computer system interconnects | Debendra Das Sharma, Mark S. Myers, Don Soltis, Ramacharan Sundararaman, Stephen R. Van Doren +1 more | 2023-08-15 |
| 11726939 | Flex bus protocol negotiation and enabling sequence | Debendra Das Sharma, Prahladachar Jayaprakash Bharadwaj, Bruce A. Tennant, Mahesh Wagh | 2023-08-15 |
| 11669481 | Enabling sync header suppression latency optimization in the presence of retimers for serial interconnect | Debendra Das Sharma, Bruce A. Tennant, Prahladachar Jayaprakash Bharadwaj | 2023-06-06 |
| 11327920 | Recalibration of PHY circuitry for the PCI express (pipe) interface based on using a message bus interface | Minxi Gao, Debendra Das Sharma, Fulvio Spagna, Bruce A. Tennant, Noam Dolev Geldbard | 2022-05-10 |
| 11232058 | Enabling sync header suppression latency optimization in the presence of retimers for serial interconnect | Debendra Das Sharma, Bruce A. Tennant, Prahladachar Jayaprakash Bharadwaj | 2022-01-25 |
| 11163717 | Reduced pin count interface | Dan Froelich, Debendra Das Sharma, Bruce A. Tennant, Quinn Devine, Su Wei Lim | 2021-11-02 |
| 11144492 | Flex bus protocol negotiation and enabling sequence | Debendra Das Sharma, Prahladachar Jayaprakash Bharadwaj, Bruce A. Tennant, Mahesh Wagh | 2021-10-12 |
| 11113196 | Shared buffered memory routing | Debendra Das Sharma, Brian S. Morris | 2021-09-07 |
| 11095556 | Techniques to support multiple protocols between computer system interconnects | Debendra Das Sharma, Mark S. Myers, Don Soltis, Ramacharan Sundararaman, Stephen R. Van Doren +1 more | 2021-08-17 |
| 10915468 | Sharing memory and I/O services between nodes | Debendra Das Sharma, Robert G. Blankenship, Suresh Chittor, Kenneth C. Creta, Balint Fleischer +2 more | 2021-02-09 |
| 10747688 | Low latency retimer | Debendra Das Sharma, Venkatraman Iyer, Tao Liang | 2020-08-18 |
| 10713209 | Recalibration of PHY circuitry for the PCI Express (PIPE) interface based on using a message bus interface | Minxi Gao, Debendra Das Sharma, Fulvio Spagna, Bruce A. Tennant, Noam Dolev Geldbard | 2020-07-14 |
| 10706003 | Reduced pin count interface | Daniel S. Froelich, Debendra Das Sharma, Bruce A. Tennant, Quinn Devine, Su Wei Lim | 2020-07-07 |
| 10606785 | Flex bus protocol negotiation and enabling sequence | Debendra Das Sharma, Prahladachar Jayaprakash Bharadwaj, Bruce A. Tennant, Mahesh Wagh | 2020-03-31 |
| 10198394 | Reduced pin count interface | Dan Froelich, Debendra Das Sharma, Bruce A. Tennant, Quinn Devine, Su Wei Lim | 2019-02-05 |
| 9921768 | Low power entry in a shared memory link | Debendra Das Sharma, Mahesh Wagh, Venkatraman Iyer | 2018-03-20 |
| 9779053 | Physical interface for a serial interconnect | Debendra Das Sharma, Daniel S. Froelich, Venkatraman Iyer, Rahul R. Shah, Eric M. Lee | 2017-10-03 |
| 9720838 | Shared buffered memory routing | Debendra Das Sharma, Brian S. Morris | 2017-08-01 |
| 9665415 | Low-latency internode communication | Debendra Das Sharma, Joseph Murray | 2017-05-30 |