Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10784204 | Rlink—die to die channel interconnect configurations to improve signaling | Kemal Aygun, Richard J. Dischler, Jeff C. Morriss, Zhiguo Qian, Wilfred Gomes +7 more | 2020-09-22 |
| 10396036 | Rlink-ground shielding attachment structures and shadow voiding for data signal contacts of package devices; vertical ground shielding structures and shield fencing of vertical data signal interconnects of package devices; and ground shielding for electro optical module connector data signal contacts and contact pins of package devices | Yu Zhang, Zhiguo Qian, Kemal Aygun, Yidnekachew S. Mekonnen, Gregorio R. Murtagian +2 more | 2019-08-27 |
| 9966938 | Forwarded clock jitter reduction | Mahalingam Nagarajan, Pradeep R. Vempada | 2018-05-08 |
| 9319039 | Forwarded clock jitter reduction | Mahalingam Nagarajan, Pradeep R. Vempada | 2016-04-19 |
| 9160320 | Apparatus, system, and method for voltage swing and duty cycle adjustment | Jian Xu, Rahul R. Shah, Kambiz R. Munshi, Ronald L. Bedard, Mahalingam Nagarajan | 2015-10-13 |
| 8542046 | Apparatus, system, and method for voltage swing and duty cycle adjustment | Jian Xu, Rahul R. Shah, Kambiz R. Munshi, Ronald L. Bedard, Mahalingam Nagarajan | 2013-09-24 |
| 7570704 | Transmitter architecture for high-speed communications | Mahalingam Nagarajan | 2009-08-04 |
| 7362739 | Methods and apparatuses for detecting clock failure and establishing an alternate clock lane | Naveen Cherukuri, Tim Frodsham, Sanjay Dabral, Rahul R. Shah, Theodore Z. Schoenborn +2 more | 2008-04-22 |