Issued Patents All Time
Showing 25 most recent of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12411518 | Throttle control circuits for throttling activity in processing segment circuits in an integrated circuit (IC) chip and related methods | Sagar Koorapati | 2025-09-09 |
| 12411748 | Converting telemetry values into common data formats in a processor-based system in an integrated circuit (IC) chip | Sagar Koorapati, Pradeep Kanapathipillai | 2025-09-09 |
| 12379762 | Dynamic power management for SoC-based electronic devices | Anubhav Mishra, Manu Gulati | 2025-08-05 |
| 12366905 | Integrated circuits (IC) chips including throttle request accumulate circuits for controlling power consumed in processing circuits and related methods | Sagar Koorapati, Vinod Chamarty, Gaurav Sanjeev Kirtane, Pushkin Raj Pari, Nitin Makhija | 2025-07-22 |
| 12287688 | Integrated circuits (IC) chips including throttle request accumulate circuits for controlling power consumed in processing circuits and related methods | Sagar Koorapati, Vinod Chamarty, Gaurav Sanjeev Kirtane, Pushkin Raj Pari, Nitin Makhija | 2025-04-29 |
| 12228988 | Merging of power events related to estimated power consumption of different devices in a hierarchical power management system in an integrated circuit (IC) chip to perform power throttling | Sagar Koorapati | 2025-02-18 |
| 11733757 | Hierarchical power management architecture for SoC-based electronic devices | Anubhav Mishra, Manu Gulati | 2023-08-22 |
| 11687139 | Multi-level CPU high current protection | Efraim Rotem, Nir Rosenzweig, Doron Rajwan, Eliezer Weissmann | 2023-06-27 |
| 11467740 | Method, apparatus, and system for energy efficiency and energy conservation including autonomous hardware-based deep power down in devices | Inder M. Sodhi, Doron Rajwan, Ryan D. Wells, Eric C. Samson | 2022-10-11 |
| 11307628 | Multi-level CPU high current protection | Efraim Rotem, Nir Rosenzweig, Doron Rajwan, Eliezer Weissmann | 2022-04-19 |
| 11287871 | Operating point management in multi-core architectures | Efraim Rotem, Oren Lamdan | 2022-03-29 |
| 11243768 | Mechanism for saving and retrieving micro-architecture context | Efraim Rotem, Eliezer Weissmann, Boris Ginzburg, Nadav Shulman, Ronny Ronen | 2022-02-08 |
| 10613614 | Dynamically controlling cache size to maximize energy efficiency | Avinash N. Ananthakrishnan, Efraim Rotem, Eliezer Weissmann, Doron Rajwan, Nadav Shulman +1 more | 2020-04-07 |
| 10564699 | Dynamically controlling cache size to maximize energy efficiency | Avinash N. Ananthakrishnan, Efraim Rotem, Eliezer Weissmann, Doron Rajwan, Nadav Shulman +1 more | 2020-02-18 |
| 10509576 | Method, apparatus, and system for energy efficiency and energy conservation including autonomous hardware-based deep power down in devices | Inder M. Sodhi, Doron Rajwan, Ryan D. Wells, Eric C. Samson | 2019-12-17 |
| 10503517 | Method for booting a heterogeneous system and presenting a symmetric core view | Eliezer Weissmann, Rinat Rappoport, Michael Mishaeli, Hisham Shafi, Oron Lenz +19 more | 2019-12-10 |
| 10474218 | Dynamically controlling cache size to maximize energy efficiency | Avinash N. Ananthakrishnan, Efraim Rotem, Eliezer Weissmann, Doron Rajwan, Nadav Shulman +1 more | 2019-11-12 |
| 10379596 | Providing an interface for demotion control information in a processor | Eliezer Weissmann, Nir Rosenzweig, Efraim Rotem, Yoav Ben-Raphael | 2019-08-13 |
| 10372197 | User level control of power management policies | Krishnakanth V. Sistla, Jeremy J. Shrall, Stephen H. Gunther, Efraim Rotem, Eliezer Weissmann +7 more | 2019-08-06 |
| 10191742 | Mechanism for saving and retrieving micro-architecture context | Efraim Rotem, Eliezer Weissmann, Boris Ginzburg, Nadav Shulman, Ronny Ronen | 2019-01-29 |
| 10185566 | Migrating tasks between asymmetric computing elements of a multi-core processor | Yuval Yosef, Eliezer Weissmann, Anil Aggarwal, Efraim Rotem, Avi Mendelson +7 more | 2019-01-22 |
| 10162687 | Selective migration of workloads between heterogeneous compute elements based on evaluation of migration performance benefit and available energy and thermal budgets | Eugene Gorbatov, Inder M. Sodhi, Ganapati Srinivasa, Eliezer Weissmann, Guarav Khanna +6 more | 2018-12-25 |
| 10127039 | Extension of CPU context-state management for micro-architecture state | Efraim Rotem, Eliezer Weissmann, Michael Mishaeli, Boris Ginzburg | 2018-11-13 |
| 10067553 | Dynamically controlling cache size to maximize energy efficiency | Avinash N. Ananthakrishnan, Efraim Rotem, Eliezer Weissmann, Doron Rajwan, Nadav Shulman +1 more | 2018-09-04 |
| 10013047 | Operating point management in multi-core architectures | Efraim Rotem, Oren Lamdan | 2018-07-03 |