Issued Patents All Time
Showing 25 most recent of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12339723 | Controlling operating voltage of a processor | Itai Feit, Doron Rajwan, Nadav Shulman, Zeev Offen, Inder M. Sodhi | 2025-06-24 |
| 12206748 | Data center job scheduling using machine learning | Siddha Ganju, Elad Mentovich, Michael Balint, Eitan Zahavi, Michael L. Sabotta +1 more | 2025-01-21 |
| 11822409 | Controlling operating frequency of a processor | Itai Feit, Doron Rajwan, Nadav Shulman, Zeev Offen, Inder M. Sodhi | 2023-11-21 |
| 11687135 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Inder M. Sodhi, Vishram Sarurkar +3 more | 2023-06-27 |
| 11507167 | Controlling operating voltage of a processor | Itai Feit, Doron Rajwan, Nadav Shulman, Zeev Offen, Inder M. Sodhi | 2022-11-22 |
| 11467740 | Method, apparatus, and system for energy efficiency and energy conservation including autonomous hardware-based deep power down in devices | Inder M. Sodhi, Alon Naveh, Doron Rajwan, Eric C. Samson | 2022-10-11 |
| 11175712 | Controlling operating voltage of a processor | Itai Feit, Doron Rajwan, Nadav Shulman, Zeev Offen, Inder M. Sodhi | 2021-11-16 |
| 11157052 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Inder M. Sodhi, Vishram Sarurkar +3 more | 2021-10-26 |
| 10963028 | System, method and apparatus for energy efficiency and energy conservation by configuring power management parameters during run time | Sanjeev Jahagirdar, Inder M. Sodhi, Jeremy J. Shrall, Stephen H. Gunther, Daniel J. Ragland +1 more | 2021-03-30 |
| 10831254 | Allocating power between multiple central processing units (CPUs) in a multi-CPU processor based on total current availability and individual CPU quality-of-service (QoS) requirements | Shivam Priyadarshi, SeyedMajid Zahedi, Derek Robert Hower, Carl A. Waldspurger, Jeffrey Todd Bridges +4 more | 2020-11-10 |
| 10705588 | Enabling a non-core domain to control memory bandwidth in a processor | Avinash N. Ananthakrishnan, Inder M. Sodhi, Efraim Rotem, Doron Rajwan, Eliezer Weissmann | 2020-07-07 |
| 10551896 | Method and apparatus for dynamic clock and voltage scaling in a computer processor based on program phase | Shivam Priyadarshi, Anil Krishna, Raguram Damodaran, Jeffrey Todd Bridges, Norman S. Gargash +1 more | 2020-02-04 |
| 10509576 | Method, apparatus, and system for energy efficiency and energy conservation including autonomous hardware-based deep power down in devices | Inder M. Sodhi, Alon Naveh, Doron Rajwan, Eric C. Samson | 2019-12-17 |
| 10429913 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Inder M. Sodhi, Vishram Sarurkar +3 more | 2019-10-01 |
| 10409346 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Inder M. Sodhi, Vishram Sarurkar +3 more | 2019-09-10 |
| 10394300 | Controlling operating voltage of a processor | Itai Feit, Doron Rajwan, Nadav Shulman, Zeev Offen, Inder M. Sodhi | 2019-08-27 |
| 10261875 | Runtime optimization of multi-core system designs for increased operating life and maximized performance | Jon James Anderson, Richard Alan Stewart, Ali Akbar Merrikh, Christopher L. Platt, Hans Lee Yeager | 2019-04-16 |
| 10248181 | Enabling a non-core domain to control memory bandwidth in a processor | Avinash N. Ananthakrishnan, Inder M. Sodhi, Efraim Rotem, Doron Rajwan, Eliezer Weissmann | 2019-04-02 |
| 10146283 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Inder M. Sodhi, Vishram Sarurkar +3 more | 2018-12-04 |
| 10139882 | System, method and apparatus for energy efficiency and energy conservation by configuring power management parameters during run time | Sanjeev Jahagirdar, Inder M. Sodhi, Jeremy J. Shrall, Stephen H. Gunther, Daniel J. Ragland +1 more | 2018-11-27 |
| 10037067 | Enabling a non-core domain to control memory bandwidth in a processor | Avinash N. Ananthakrishnan, Inder M. Sodhi, Efraim Rotem, Doron Rajwan, Eliezer Weissmann | 2018-07-31 |
| 9996135 | Controlling operating voltage of a processor | Itai Feit, Doron Rajwan, Nadav Shulman, Zeev Offen, Inder M. Sodhi | 2018-06-12 |
| 9983792 | Dynamic cache sharing based on power state | Michael J. Muchnick, Chinnakrishnan Ballapuram | 2018-05-29 |
| 9939879 | Controlling operating frequency of a core domain via a non-core domain of a multi-domain processor | Avinash N. Ananthakrishnan, Efraim Rotem, Doron Rajwan, Jeremy J. Shrall, Eric C. Samson +1 more | 2018-04-10 |
| 9904346 | Methods and apparatus to improve turbo performance for events handling | Ohad Falik, Jose P. Allarey | 2018-02-27 |