Issued Patents All Time
Showing 25 most recent of 80 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12413099 | Wireless enhanced power transfer | Michael Wolf | 2025-09-09 |
| 12241453 | Rotation limit detector | Soeren Adrian Schmidt | 2025-03-04 |
| 11275637 | Aggregated page fault signaling and handling | Ronny Ronen, Ilya Osadchiy | 2022-03-15 |
| 11243768 | Mechanism for saving and retrieving micro-architecture context | Efraim Rotem, Eliezer Weissmann, Alon Naveh, Nadav Shulman, Ronny Ronen | 2022-02-08 |
| 10558490 | Mechanism for issuing requests to an accelerator from multiple threads | Ronny Ronen, Eliezer Weissmann | 2020-02-11 |
| 10467012 | Apparatus and method for accelerating operations in a processor which uses shared virtual memory | Eliezer Weissmann, Karthikeyan Vaithianathan, Yoav Zach, Ronny Ronen | 2019-11-05 |
| 10255126 | Aggregated page fault signaling and handling | Ronny Ronen, Ilya Osadchiy | 2019-04-09 |
| 10191742 | Mechanism for saving and retrieving micro-architecture context | Efraim Rotem, Eliezer Weissmann, Alon Naveh, Nadav Shulman, Ronny Ronen | 2019-01-29 |
| 10185566 | Migrating tasks between asymmetric computing elements of a multi-core processor | Alon Naveh, Yuval Yosef, Eliezer Weissmann, Anil Aggarwal, Efraim Rotem +7 more | 2019-01-22 |
| 10127039 | Extension of CPU context-state management for micro-architecture state | Efraim Rotem, Eliezer Weissmann, Michael Mishaeli, Alon Naveh | 2018-11-13 |
| 10120691 | Context switching mechanism for a processor having a general purpose core and a tightly coupled accelerator | Ronny Ronen, Eliezer Weissmann, Karthikeyan Vaithianathan, Ehud Cohen | 2018-11-06 |
| 10078519 | Apparatus and method for accelerating operations in a processor which uses shared virtual memory | Eliezer Weissmann, Karthikeyan Vaithianathan, Yoav Zach, Ronny Ronen | 2018-09-18 |
| 9971688 | Apparatus and method for accelerating operations in a processor which uses shared virtual memory | Eliezer Weissmann, Karthikeyan Vaithianathan, Yoav Zach, Ronny Ronen | 2018-05-15 |
| 9891291 | Magnetic tracking system | Arie Sheinker, Nizan Salomonski | 2018-02-13 |
| 9892481 | CPU/GPU synchronization mechanism | Esfirush Natanzon, Ilya Osadchiy, Yoav Zach | 2018-02-13 |
| 9891980 | Aggregated page fault signaling and handline | Ronny Ronen, Ilya Osadchiy | 2018-02-13 |
| 9747221 | Dynamic pinning of virtual pages shared between different type processors of a heterogeneous computing platform | Gad Sheaffer, Ronny Ronen, Eliezer Weissmann | 2017-08-29 |
| 9727476 | 2-D gather instruction and a 2-D cache | Oleg Margulis | 2017-08-08 |
| 9720730 | Providing an asymmetric multicore processor system transparently to an operating system | Ilya Osadchiy, Ronny Ronen, Eliezer Weissmann, Michael Mishaeli, Alon Naveh +13 more | 2017-08-01 |
| 9678751 | Systems, apparatuses, and methods for performing a horizontal partial sum in response to a single instruction | Elmoustapha Ould-Ahmed-Vall, Moustapha Hagog, Robert Valentine, Amit Gradstein, Simon Rubanovich +2 more | 2017-06-13 |
| 9633407 | CPU/GPU synchronization mechanism | Esfirush Natanzon, Ilya Osadchiy, Yoav Zach | 2017-04-25 |
| 9552207 | Method and apparatus for performance efficient ISA virtualization using dynamic partial binary translation | Gadi Haber, Konstantin Levit-Gurevich, Esfir Natanzon, Aya Elhanan, Moshe Maury Bach +1 more | 2017-01-24 |
| 9405701 | Apparatus and method for accelerating operations in a processor which uses shared virtual memory | Eliezer Weissmann, Karthikeyan Vaithianathan, Yoav Zach, Ronny Ronen | 2016-08-02 |
| 9396020 | Context switching mechanism for a processing core having a general purpose CPU core and a tightly coupled accelerator | Ronny Ronen, Eliezer Weissmann, Karthikeyan Vaithianathan, Ehud Cohen | 2016-07-19 |
| 9361101 | Extension of CPU context-state management for micro-architecture state | Efraim Rotem, Eliezer Weissmann, Michael Mishaeli, Alon Naveh | 2016-06-07 |